Yes. Even with the buffer stage the RC filter is a good idea as an anti-aliasing filter before the ADC.

Thank you for all your help, I learned so much already!

I read the document regarding the single pole RC-filter and that it can help in case the amplifier can not drive an ADC directly (so the RC-filter will remove peak drive requirements from the source).

What I fail to understand yet is, why is that so?
In case I add a buffer stage (active component like an omp-amp in unity gain configuration) I understand that the omp-amp has very high input impedance and very low output impedance. So not that much current is drawn from the instrumentation-amplifier.
But why do I get the same effect (reducing the driving requirements for the instrumentation-amplifier) in case I add a single pole RC-filter in between?

I hope you can help me to understand this, thank you

 

The problem (in theory) is opamp stability while driving a discharged capacitive step load. The very low output impedance (high current drive of a voltage source) of a unity buffer stage can handle the exponential charge rate (high initial current) of the discharged sample capacitance without much variation in output voltage at the end of the required sample time if the total load capacitance is small.
You should still use a small resistance (10-100 Ω) value RC network at the ADC input even with a buffer stage to insure stability.

For a direct connected opamp gain stage the lower output drive means the output voltage might sag significantly during this high initial current period causing the opamp feedback voltage to change without a change in the input signal. This effect can cause ringing or stability problems with the gain stage. The easy way to reduce this initial current is to a add series resistance R to limit the initial current when the sample capacitor is switched to the source.
http://hyperphysics.phy-astr.gsu.edu/hbase/electric/capchg.html

 

The problem (in theory) is opamp stability while driving a discharged capacitive step load. The very low output impedance (high current drive of a voltage source) of a unity buffer stage can handle the exponential charge rate (high initial current) of the discharged sample capacitance without much variation in output voltage at the end of the required sample time if the total load capacitance is small.
You should still use a small resistance (10-100 Ω) value RC network at the ADC input even with a buffer stage to insure stability.

For a direct connected opamp gain stage the lower output drive means the output voltage might sag significantly during this high initial current period causing the opamp feedback voltage to change without a change in the input signal. This effect can cause ringing or stability problems with the gain stage. The easy way to reduce this initial current is to a add series resistance R to limit the initial current when the sample capacitor is switched to the source.
http://hyperphysics.phy-astr.gsu.edu/hbase/electric/capchg.html

Awesome explanation, thank you very much!

So to get back to the single pole RC-filter, the most important is the series resistance to "block" the high initial charge current of the sampling capacitor. The parallel cap does not have any impact here regarding the buffer stage, the nice bonus of the cap is that it can act as a anti-aliasing filter.
Did I get this right?

That also means the higher the resistor's value the less current the amplifier sees (coming from the charging cap of the ADC) less variation in it's output voltage the amplifier is going to experience.
So basically also a resistor value as big as > 1k Ohm would work as long as my time constant is fast enough for my application.
Are my statements right?

Thank you very much!

 

Yes.