hello experts
look this following instruction
Instruction word structure:
c c c c . . . . . . . . . . . . Opcode (4 bits)
. . . . s s s s s s . . . . . . Source specification (6 bits)
. . . . . . . . . . d d d d d d Destination specification (6 bits)
(Total instruction word length = 16 bits.)
Source specification:
0 0 i i i i Immediate 4-bit value
0 1 x x x x Not used
1 0 r r r r Register
1 1 m m m m Memory
Destination specification:
0 r r r r r Register
1 m m m m m Memory
c c c c . . . . . . . . . . . . Opcode (4 bits):
0 0 0 0 . . . . . . . . . . . . nop
0 0 0 1 . . . . . . . . . . . . move from source to dest
0 0 1 0 . . . . . . . . . . . . add source to dest
0 0 1 1 . . . . . . . . . . . . subtract source from dest
. . . . t t d d d d . . . . . . Source data type and specification:
. . . . 0 0 i i i i . . . . . . Immediate (iiii is 4-bit data)
. . . . 0 1 x x x x . . . . . . (not used)
. . . . 1 0 r r r r . . . . . . Register (rrrr specifies the register)
. . . . 1 1 a a a a . . . . . . Memory (aaaa specifies the address)
. . . . . . . . . . t s s s s s Destination data type and specification:
. . . . . . . . . . 0 r r r r r Register (rrrr specifies the register)
. . . . . . . . . . 1 a a a a a Memory (aaaa specifies the address)
Instruction examples: (look zip file for table)
c c c c t t s s s s t t d d d d
0 0 0 0 x x x x x x x x x x x x nop
move #6,R3 (set R3 to zero)
c c c c t t s s s s t d d d d d
0 0 0 1 0 0 0 1 1 0 0 0 0 0 1 1
move R3,R12 (copy value in R3 into R12)
c c c c t t s s s s t d d d d d
0 0 0 1 1 0 0 0 1 1 0 0 1 0 1 1
move R5,(9) (store R5 to memory at location 9
c c c c t t s s s s t d d d d d
0 0 0 1 1 0 0 1 0 1 1 0 1 0 0 0
move (9),R5 (load R5 from memory location 9)
c c c c t t s s s s t d d d d d
0 0 0 1 0 0 1 0 0 1 0 0 0 1 0 0
add R5,9 (add R5 to memory at location 9)
c c c c t t s s s s t d d d d d
0 0 1 0 1 0 0 1 0 1 1
add #3,R5 (add 3 to R5)
c c c c t t s s s s t d d d d d
0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 0
inc R3 (add 1 to R3)
c c c c t t s s s s t d d d d d
0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0
I want to create ALU , decoder and program counter for this processor
Q1 which alu I need to use 4 bit or 8 bit alu ?
Q2 can we use 8 to 3 decoder ?
Q3 can we use 16 bit program counter ?
look this following instruction
Instruction word structure:
c c c c . . . . . . . . . . . . Opcode (4 bits)
. . . . s s s s s s . . . . . . Source specification (6 bits)
. . . . . . . . . . d d d d d d Destination specification (6 bits)
(Total instruction word length = 16 bits.)
Source specification:
0 0 i i i i Immediate 4-bit value
0 1 x x x x Not used
1 0 r r r r Register
1 1 m m m m Memory
Destination specification:
0 r r r r r Register
1 m m m m m Memory
c c c c . . . . . . . . . . . . Opcode (4 bits):
0 0 0 0 . . . . . . . . . . . . nop
0 0 0 1 . . . . . . . . . . . . move from source to dest
0 0 1 0 . . . . . . . . . . . . add source to dest
0 0 1 1 . . . . . . . . . . . . subtract source from dest
. . . . t t d d d d . . . . . . Source data type and specification:
. . . . 0 0 i i i i . . . . . . Immediate (iiii is 4-bit data)
. . . . 0 1 x x x x . . . . . . (not used)
. . . . 1 0 r r r r . . . . . . Register (rrrr specifies the register)
. . . . 1 1 a a a a . . . . . . Memory (aaaa specifies the address)
. . . . . . . . . . t s s s s s Destination data type and specification:
. . . . . . . . . . 0 r r r r r Register (rrrr specifies the register)
. . . . . . . . . . 1 a a a a a Memory (aaaa specifies the address)
Instruction examples: (look zip file for table)
c c c c t t s s s s t t d d d d
0 0 0 0 x x x x x x x x x x x x nop
move #6,R3 (set R3 to zero)
c c c c t t s s s s t d d d d d
0 0 0 1 0 0 0 1 1 0 0 0 0 0 1 1
move R3,R12 (copy value in R3 into R12)
c c c c t t s s s s t d d d d d
0 0 0 1 1 0 0 0 1 1 0 0 1 0 1 1
move R5,(9) (store R5 to memory at location 9
c c c c t t s s s s t d d d d d
0 0 0 1 1 0 0 1 0 1 1 0 1 0 0 0
move (9),R5 (load R5 from memory location 9)
c c c c t t s s s s t d d d d d
0 0 0 1 0 0 1 0 0 1 0 0 0 1 0 0
add R5,9 (add R5 to memory at location 9)
c c c c t t s s s s t d d d d d
0 0 1 0 1 0 0 1 0 1 1
add #3,R5 (add 3 to R5)
c c c c t t s s s s t d d d d d
0 0 1 0 0 0 0 0 1 1 0 0 1 0 0 0
inc R3 (add 1 to R3)
c c c c t t s s s s t d d d d d
0 0 1 0 0 0 0 0 0 1 0 0 0 0 1 0
I want to create ALU , decoder and program counter for this processor
Q1 which alu I need to use 4 bit or 8 bit alu ?
Q2 can we use 8 to 3 decoder ?
Q3 can we use 16 bit program counter ?
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