# How to design an ADC circuit with an external sampled signal?

Joined Oct 3, 2022
4
Hi everyone,

I'm very new to designing a circuit. So, I need some help.

I need to design an ADC for an external, sampled, single-ended signal. The frequency is 1 Mhz, and desired speed is at least 4msps and the resolution is at least 14 bits.
I checked ADC chips and found LTC2314-14 to use. But, LTC2314-14 has inputs for S/H, and my input signal is already sampled. Would it be a problem? (LTC2314-14 Datasheet: https://www.mouser.com/datasheet/2/609/231414fa-2954440.pdf )

If there are any different ADC chips that you would recommend, please let me know. (Preferably, easy to solder). Also, which additional components should I use in my design?

#### Ian0

Joined Aug 7, 2020
6,294
If your input signal is already sampled, why do you need an A/D?

Joined Oct 3, 2022
4
If your input signal is already sampled, why do you need an A/D?
To get last digital output signal for processing on a fpga. Is there another way to do that?

#### Ian0

Joined Aug 7, 2020
6,294
Probably, I chose wrong word. The input signal comes from a sample-hold circuit. Does it has a different name?
Now I see. . . .
Successive approximation A/Ds have a sample and hold built in. It shouldn’t make any difference whether you measure the original signal, or after it has been through the sample-and-hold.
It would be ideal if you triggered the A/D to start its conversion when your S&H is in its “hold” phase, and if the two ran at the same rate.

Joined Oct 3, 2022
4
Now I see. . . .
Successive approximation A/Ds have a sample and hold built in. It shouldn’t make any difference whether you measure the original signal, or after it has been through the sample-and-hold.
It would be ideal if you triggered the A/D to start its conversion when your S&H is in its “hold” phase, and if the two ran at the same rate.
Thank you so much. It will help me a lot. I was trying to find an adc that is not S/H built-in.

To run them at the same rate, should I arrange the CLK? Sorry if the question seems too simple.

#### Ian0

Joined Aug 7, 2020
6,294
Thank you so much. It will help me a lot. I was trying to find an adc that is not S/H built-in.

To run them at the same rate, should I arrange the CLK? Sorry if the question seems too simple.
Perhaps.
Some might have a trigger input. SPI types start when they SPI command is issued.