It's dependent on the transistor specs and component values used.But you still have variable Vq1b so how did you know what Vq1b is?
On the breadboard the actual voltage measure is 4.02V on the emitter and 4.2V on the base.
It's dependent on the transistor specs and component values used.But you still have variable Vq1b so how did you know what Vq1b is?
Their is no way to derive it mathmatically? I can check simulation too and get it but was wondering how to get itIt's dependent on the transistor specs and component values used.
On the breadboard the actual voltage measure is 4.02V on the emitter and 4.2V on the base.
Sorry, Q1 and Q3.which two transistors you want me to recognize configuration?
I get vout as 4.971V and vbq1 of 4.56V. Thats from ltspice simulation.Not accurately by just looking at the components values used.
What does your sim show for this circuit?
View attachment 340835
Darlington pair???Sorry, Q1 and Q3.
That's pretty close to my numbers.I get vout as 4.971V and vbq1 of 4.56V. Thats from ltspice simulation.
How does the circuit post #1 work?That's pretty close to my numbers.
When power is first applied Q1 turns ON, which then turns Q3 ON. Vr5 is appx 4 volts and Vout is 5V.How does the circuit post #1 work?
Its hard to understand because I think you have the transistors Q1, Q2, Q3 mixed up? One example C1 is not connected to the base of Q2. Their is alot of other mixed up so I am not sure how it still works.When power is first applied Q1 turns ON, which then turns Q3 ON. Vr5 is appx 4 volts and Vout is 5V.
Now C1 begins charging through R2 and D1. As the charge on C1 which is connected to the base of Q2 rises above the emitter voltage the transistor starts to conduct reducing the bias on Q1. Q1 will shut OFF turning OFF Q3 and Vout is 0V.
Once Q3 shuts OFF C1 begins discharging through R1,R2 and R3 until the voltage on the base of Q2 is too low to maintain conduction. The collector of Q2 begins to rise increasing the bias on Q1 until it begins to conduct again turning on Q3.
And the cycle repeats creating a square wave oscillator.
The use of feedback bias from Q3 to Q2 through D1 is the reason the transistors switch ON and OFF rapidly.
Creating a daisy chain effect.
Apologize for that, below is the correct operation sequence.Its hard to understand because I think you have the transistors Q1, Q2, Q3 mixed up? One example C1 is not connected to the base of Q2. Their is alot of other mixed up so I am not sure how it still works.
Did you figure this out by ltspice simulation? How did you use ltspice to figure all this?Apologize for that, below is the correct operation sequence.
When power is first applied Q1 turns ON, which then turns Q2 ON. Vr5 is appx 4 volts and Vout is 5V.
Now C1 begins charging through R2 and D1. As the charge on C1 which is connected to the base of Q3 rises above the emitter voltage the transistor starts to conduct reducing the bias on Q1. Q1 will shut OFF turning OFF Q2 and Vout is 0V.
Once Q2 shuts OFF C1 begins discharging through R1,R2 and R3 until the voltage on the base of Q3 is too low to maintain conduction. The collector of Q3 begins to rise increasing the bias on Q1 until it begins to conduct again turning on Q2.
And the cycle repeats creating a square wave oscillator.
The use of feedback bias from Q2 to Q3 through D1 is the reason the transistors switch ON and OFF rapidly.
Creating a daisy chain effect.
No just from understanding how transistors operate.Did you figure this out by ltspice simulation? How did you use ltspice to figure all this?
How? I have trouble figuring out if q1 is open or close at start. Can you share exactly how you arrived?No just from understanding how transistors operate.
Then you need to study up on how npn and pnp transistors operate.How? I have trouble figuring out if q1 is open or close at start. Can you share exactly how you arrived?
I know how they work but i cant get how you calculated q1 vbe at the start? Without vbe their is no way to know for sure state of q1. Its gets complicated you know with feedback and collector and emitter resistorThen you need to study up on how npn and pnp transistors operate.
Post #31 explains the operation.
We have had this same conversation before.