I've been working on a pulse generator, and am using a capacitor to charge/discharge in around 100ns to excite an ultrasonic transducer.

My goal has been to essentially use an industrial grade thickness gauge probe, the PT-12, and develop the software on a microcontroller to operate it and process the returned waveform. The other necessary part of making this probe work without the professional gauge meter, is that there must be a power source. I've figured that part out essentially with the exception of this next issue.

The microcontroller needs to interface with the capacitor in order to control the pulse width and the sampling rate of the transducer, and it seems like a power mosfet of some type will be the best option. Since there is a possibility of leakage capacitance through the mosfet I'll be using a gate driver of some sort (haven't found one that can meet specs yet, suggestions welcome). I've had been warned that there is a high possibility the quick change in voltage of the capacitor will interfere with the operation of the mosfet, potentially damaging it. Supposedly, even if the mosfet is rated for the voltage and current passing through it, many datasheets do not include parameters such as dV/dT. Since there is such a low current coming through the resistor, when the mosfet lets the pulse through the current heading into the transducer shouldn't be too much of a problem. Since the PT-12 has it's two coaxes isolated, I don't think capacitance between the microcontroller and the transducer itself will be an issue either.

The duration I've been working on this project, it's become clear there are many things I don't understand about how electronic circuits work. If there are any other possible problems that I might not be aware of I'd appreciate the warning.

 

I found a pretty detailed source on the issue. Unfortunately much of it went over my head and am still unsure if this will be a problem for my circuit. It mentioned that a high dV/dT can be a problem DURING the switch event of the MOSFET. I think this is different than switching, and the capacitor causing a high dV/dT.

https://toshiba.semicon-storage.com/info/docget.jsp?did=59464 (Link downloads a pdf)

As I've been researching components, many of these high voltage mosfets will say something along the lines of "improved dV/dT capabilities" without explaining any further. What would be a good value to compare as "high" for dV/dT and "low" for dV/dT?

 

Short answer is its process related, eg. what will cause the parasitic
bipolar in the mosfet to breakdown causing hot spots in the collector,
even Si meltdown.

So real answer is higher is better.

The right way to proceed is to sim in SPICE the transient so that you
can look at the dV/dT generated. Or use a scope and look at actual
result at MOSFET drain. Of course this is all layout/proto construction
sensitive. Care at minimizing parasitic L in the layout probably the
most important. Same can be said for R in high current paths.

One should also examine the spice model statements, some models
are so incomplete as to be laughable. You can contact the respective
vendor and ask how reliable and complete their model is and examine
their response for "truthiness".

Regards, Dana.

 

You can contact the respective
vendor and ask how reliable and complete their model is and examine
their response for "truthiness".

Nobody likes admitting their software is bupkis.

 

Since the PT-12 has it's two persuades disconnected, I don't think capacitance between the microcontroller and the transducer itself will be an issue either.

That's what I like to hear.