A client gave me a two layer TM4C123GXL board layout this week for design review wanting to push it into production in the 10K plus qty level. I called out a number of typical design violations and the client went crazy defending the design as meeting normal industry standards.
The layout to me is poorly placed and autorouted with traces hopping between layers several times and no attention to maintaining return path signal integrity. Eagle EDA had added over 700 microvias to stitch the badly chopped up ground planes together.
I took a long day and found a natural placement so 95% of the traces are on the top side, and a dozen or so short traces are on the edges of the bottom side to untangle ordering on several connectors. USB shortened to 8mm with series termination. Xtal shortened to 6mm Total trace length on the board is 25% of clients design. Bypass caps right against processor and other parts with 1/3 the original loop path. And of course client walked away for calling it for what it appears to be to me.
So I have to ask, is this what is now considered industry acceptable designs for high volume products?

The layout to me is poorly placed and autorouted with traces hopping between layers several times and no attention to maintaining return path signal integrity. Eagle EDA had added over 700 microvias to stitch the badly chopped up ground planes together.
I took a long day and found a natural placement so 95% of the traces are on the top side, and a dozen or so short traces are on the edges of the bottom side to untangle ordering on several connectors. USB shortened to 8mm with series termination. Xtal shortened to 6mm Total trace length on the board is 25% of clients design. Bypass caps right against processor and other parts with 1/3 the original loop path. And of course client walked away for calling it for what it appears to be to me.
So I have to ask, is this what is now considered industry acceptable designs for high volume products?
