Hi there,
I have to design a Up/Down counter. I can use as many logic gates, combinatinal and secuential blocs that I need.
The input signal E as well as the output signal S are represented in complement a2.
E rang goes from [-32,31] and S goes from [0,31].
What would be the bus value from the in and out.
I thin E would be 7 bits and S 6 bits
Circuit SPECS
a) The circuit has a clock in
b) C1 in
c) C0 in
C1.....C0..... S+
0 ...... 0...... S
0 .......1...... (S+1)mod32
1....... 0 ......(S-1)mod32
1 .......1....... Emod32
Functional Decimal table of the circuit
E.... S...... C1...... C0....... S+
-31. x....... 1 ........1......... 1
x ....1....... 0........ 1 .........2
x ....2....... 1........ 0 .........1
x ....1....... 1........ 0......... 0
x ....0....... 1........ 0........ 31
Thx
I have to design a Up/Down counter. I can use as many logic gates, combinatinal and secuential blocs that I need.
The input signal E as well as the output signal S are represented in complement a2.
E rang goes from [-32,31] and S goes from [0,31].
What would be the bus value from the in and out.
I thin E would be 7 bits and S 6 bits
Circuit SPECS
a) The circuit has a clock in
b) C1 in
c) C0 in
C1.....C0..... S+
0 ...... 0...... S
0 .......1...... (S+1)mod32
1....... 0 ......(S-1)mod32
1 .......1....... Emod32
Functional Decimal table of the circuit
E.... S...... C1...... C0....... S+
-31. x....... 1 ........1......... 1
x ....1....... 0........ 1 .........2
x ....2....... 1........ 0 .........1
x ....1....... 1........ 0......... 0
x ....0....... 1........ 0........ 31
Thx
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