Hi everyone,


I'm currently working on a PFC boost converter and had a few doubts regarding the duty ratio, especially in relation to steady-state and transient response.


I'm referring to Ned Mohan's First Course on Power Electronics, where the author mentions that applying a duty ratio of
D(t) = 1 − Vs·|sin(ωt)| / Vd
can yield the required output voltage. My question is: how does this duty ratio result in a sinusoidal input current?


Specifically, I’m wondering—if I design the circuit without any feedback control and simply apply this duty ratio to the switch, will I actually get a sinusoidal input current? If not, why? In rudimentary power converters, we had a fixed duty ratio that we gave to the switch to get the required output..here we have two conditions to satisfy: sinusoidal input current and fixed output voltage..how does one duty ratio satisfy both? I referred to some YT lectures and textbooks regarding this doubt but wasnt able to find an answer to it (maybe my doubt itself is vague and I lack the knowledge to grasp the answer that is implicitly stated :*) . ).


I understand that the duty ratio is shaped to mimic the input voltage waveform, but I’m unclear on how that alone ensures the input current follows a sinusoid. Does the input current waveform depend on the inductor dynamics or the presence of a current loop?


Would really appreciate any insights or clarifications from the community.


Thanks in advance!

 

Quick answer; no.
Download the data sheet for a simple PFC chip, like the L6562A.
You will see in the block diagram and the example circuit, that the rectified AC waveform is multiplied by the output voltage error (Vref-Vfbk), and this determines the actual PWM value.
Thus….Zero voltage feedback means maximum error, which will max out the PWM value regardless of the sinewave.

There are other embellishments to the actual PWM, which are related to protection and leading edge blanking, or to maintain critical conduction, but in a nutshell this is how PFC circuits work.

 

Quick answer; no.
Download the data sheet for a simple PFC chip, like the L6562A.
You will see in the block diagram and the example circuit, that the rectified AC waveform is multiplied by the output voltage error (Vref-Vfbk), and this determines the actual PWM value.
Thus….Zero voltage feedback means maximum error, which will max out the PWM value regardless of the sinewave.

There are other embellishments to the actual PWM, which are related to protection and leading edge blanking, or to maintain critical conduction, but in a nutshell this is how PFC circuits work.

Hello Sir/Madam,
Thank you for the reply. I couldn't understand your answer completely..i will take some time to reflect on it. But the initial part you said that I cant get a sinusoidal input current with this fixed duty ratio. my question suceeding this would be then what is this duty ratio even useful for? Is it only to get the output voltage fixed? How do I get my sinusoidal input current? Could you please tell me the strategy on how to get unity power factor for a CCM Average current control PFC Boost Converter? I will ask my doubts succeeding the conversation.
This duty ratio mentioned in the textbook ...what even is its purpose? What does it signify? I hope my doubts are clear..do respond and ask me to state them more clearly if they are ambiguous. I need all the guidance i can receive. Thank you once again for taking the time to answer my queries. Means a lot!

 

Unfortunately too much information to be able to respond in a forum post.

If you’re are really interested in PFC circuits I recommend that you study an old Unitrode app note, U132. At 17 pages long, it will give you a boatload of details.
Also study chapter 15 of Switching Power Supply Design, 2nd edition, by Abraham I Pressman. At 28 pages long, it will provide all the information that you require to completely understand these concepts.

 

I understand that the duty ratio is shaped to mimic the input voltage waveform, but I’m unclear on how that alone ensures the input current follows a sinusoid. Does the input current waveform depend on the inductor dynamics or the presence of a current loop?

The goal is to make the load look like a resistor load. So, the current should follow the voltage.
The IC looks at the line voltage and adjusts the current to make the same waveform (usually a sine wave) The IC does not make a sine but just follows the lie voltage.

how does this duty ratio result in a sinusoidal input current?

Lets say we need 1A rms from the power line. That is 1.414A at the peak and 0A at 0V.
The error amp is not looking at the input voltage but is looking at the output voltage and responds very very slow.
The error amp will in our example have an output voltage of 1.0V which will set the rms current to 1.0A. There is a multiplier that takes the error amp output and multiplies the line voltage. The (1V from the error amp) X ( line voltage) =1.414 at the peak and 0V at cero crossing. The output of the multiplier is a half sine wave and drives the duty cycle which sets the current.

 

Unfortunately too much information to be able to respond in a forum post.

If you’re are really interested in PFC circuits I recommend that you study an old Unitrode app note, U132. At 17 pages long, it will give you a boatload of details.
Also study chapter 15 of Switching Power Supply Design, 2nd edition, by Abraham I Pressman. At 28 pages long, it will provide all the information that you require to completely understand these concepts.

Hello Sir/Madam, thank you for replying. I read the chapter in SPSD by Abraham L Pressman. Very knowledgable. Thank you for referring me to the book. I am now currently referring t the U-132 app note you mentioned. It is a bit complex for me but I will let you know if i have any doubts regarding it. I hope you retain the patience of clearing my doubts. I thank you immensely for your support in my quagmire.

From the information i garnered in the SPSD Abraham L book, I came to a few conclusions..I hope you can tell me if they are right or not.

1. The duty ratio I gave previously from the Ned Mohan book, it only applies to the output voltage..for the current shaping, it is mandatory to use a control loop that shapes the input current according to the reference. (In the SPSD Abraham book, it was stated that the control voltage is a mixture (generated in real time by a multiplier) that is proportional to both the output voltage error voltage signal and input current error voltage signal. this mixed signal is what is given as the pwm reference for the pwm generator.

2. Active current shaping requires a control loop. It cannot be done only with a fixed Duty ratio given to the switch. Only output voltage contrl can be done in that manner.

This brings me to my doubts..what is the control logic of following the reference current signal? how does the duty ratio be varied so that it can be satisfying both the conditions of current following and output voltage maintenance? (As in the SPSD book, this wasnt emphasized)
If you could give me more reference books i can refer to, it would be extrememly helpful, or share your insights in the matter, that too would be very helpful to me. I sincerely thank you once again for answring my queries.!

I am trying to run a MATLAB Simulink simulation of an active PFC CCM Average current controlled pfc converter..I still dont understand the logic of the swithcing pulse being able to satisfy both the input current being sinusoidal and output voltage being constant conditions. I although understand the mathematical formualtion of the output voltage being constant (the duty ratio derived in the NEd mohan textbook), I dont understand how a duty ratio relation can be established for the current. I hope you understood my query. Thank you for your patience..

 

The PFC makes 400V with lots of ripple. It does not try to remove the ripple. The ripple frequency is 120hz. The error amplifier is very slow and there should be no 120hz ripple on its output.
I crossed out the "Square" and "Div" blocks to make it simple.
The PWM is a simple voltage compare and a Flip Flop driven by a high frequency clock.
The PWM inputs; are a 120hz half sine wave and the current in the MOSFET. Every clock the MOSFET is turned on The MOSFET is turned off then the current reaches the desired level as set by the other input.

The error amplifier output will increase or decrease the size of the half sign wave going into the PWM, which changes the current in the MOSFET.

This is a simple version. The MOSFET current can be continuous or discontinuous.
I never worried about the duty cycle because I know it was whatever it takes to get the current up to the right level.

Discontinuous and Continuous.
Sorry for the bad drawing. On the left Red=MOSFET current Blue=Diode current. Current drops to zero every cycle.
On the right Blue is inductor current.

 

Don’t despair. It takes some patience to understand the concept. But once it does, everything becomes clearer.
The difficulty with PFC circuits is that there are three distinct operating modes: continuous, critical and discontinuous current-conduction modes. Each has its own strengths and limitations.
But every one, in its basic form, relies in the multiplication of the input voltage waveform and the feedback error voltage.

 

One place to be confused with PFC is the difference between current mode and voltage mode PWM.
Voltage mode is the oldest and is tough first.
All PFC that I have used are current mode. It is a very different animal. I really like current mode.

 

One place to be confused with PFC is the difference between current mode and voltage mode PWM.
Voltage mode is the oldest and is tough first.
All PFC that I have used are current mode. It is a very different animal. I really like current mode.

Hello Sir/Madam, thank you for taking time and replying to my query. Im sorry i wasnt able to address your first reply in the forum. Thank you for your insights into my doubts. It was really helpful.
I see that you mentioned about voltage and current control. According to the lectures and reference books i referred...The voltage loop gives the reference amplitude for the reference input current signal. The voltage loop is responsible to give the required amplitude for the current reference and the current loop is responsible for maintaining the current shape (sinusoidal).

Mr/Ms Trigger was very helpful in explainig to me the functioning of the PFC COnverter with a detailed diagram. He mentioned to me the differnt modes a PFC can be operated in (Cont and Discont). He was very helpful with his explanation. Although I understand what hes trying to tell me, my doubt still remains unanswered (maybe it is answered implicitly but I remain oblivious to it yet)..

My doubt is this:
We have a formula to calculate the duty ratio that is required to be given to the mosfet to maintain the required output voltage (400V). This is given by d=1-(Vs/Vd).
In a similar manner, do we have a duty ratio formula that relates the inductor current to the sinusoida refernce shape?
In the SPSD book, the author mentioned that the error voltage is the product (from the multiplier block) of the current error voltage and the voltage error voltage. How are these two being multiplied such that the condition on the duty ratio satisfies both the necessities of constant output voltage and the sinusoidal input current tracking?

Mr Trigger was very clear with his explanantion..he explained how (according to analog design) the referece voltage is tracked and how the error amplifier signal changes its magnitude etc..(I even understood the 120hz ripple part which was explicitly mentioned in ned mohans book where the diode current was broken down into parts to expose the dc current and the 120hz current).
But I fail to see how the duty ratio relates to be able to follow the siusoidal current tracker.
I get the basic idea. The high swithcing frequency (in Khz) chops up the reference current signal (which is in 120hz) into multiple sub parts where the value can be considered a constant and this can give us the required duty ratio to track the current signal..(the value of the reference current signal in this swithcing interval is the average current that the average inductor current needs to track and the duty ratio in that interval is set accordingly.)
In this sense...how would the duty ratio vary to follow the current and the voltage? Is there an equation or a function that is able to relate the average duty ratio to the indcutor current. And does this duty ratio in combination with the output voltage duty ratio satisfy both the conditions? Is there a case where one is satisfied and one isnt? These are my doubts. I hope you can help me with these. Anyone sharing their knowledge would be immensely helpful.

I hope nobody found me rude, im a slow learner and confused about this. I apologise if im frustrating anyone with my lack of awareness in the subject.

 

Don’t despair. It takes some patience to understand the concept. But once it does, everything becomes clearer.
The difficulty with PFC circuits is that there are three distinct operating modes: continuous, critical and discontinuous current-conduction modes. Each has its own strengths and limitations.
But every one, in its basic form, relies in the multiplication of the input voltage waveform and the feedback error voltage.

Hello Mr. Trigger,

I just wanted to share that I’ve found a solution to my original query. I was able to achieve power factor correction operation using only direct duty ratio control, without implementing a separate current loop. This approach was supported by a research paper published by Ryerson University, which clarified the feasibility of such a method.

Thank you for your patience and guidance throughout this process. Your insights were incredibly helpful in shaping my understanding. I also want to express my gratitude to everyone else who contributed to this thread. Your responses played a key role in helping me work through my doubts.

Looking forward to learning more with this community! Best Regards!
Voyage