Help needed in synchronous sequential counter state diagram and state table

Thread Starter

leodavinci90

Joined Oct 22, 2014
57
A counter needs to produce a 4-bit digital output representing decimal base numbers (5351619).
The sequence starts with the first digit on the left to the right and then when the output is the right digit it goes back to the first digit. We use a D Flip-Flop.
1- required to draw state diagram with letters referring to state and outputs remains in decimal format.
2 - required to convert diagram to state table.
Attached is a solution to the two questions. Can you comment on the correctness and kindly provide your advice.

Regards.
http://forum.allaboutcircuits.com/attachments/state_diagram_state_table-jpg.83824
 

WBahn

Joined Mar 31, 2012
29,932
What is this "toggle function"?

I appears you are just using a mod-7 binary counter and mapping the state variables to the BCD encoding of the digit associated with that state. That seems perfectly reasonable.
 

Thread Starter

leodavinci90

Joined Oct 22, 2014
57
Thanks for your reply. To answer your question Toggle is the output.
If I wish to continue with the exercise by switching state variables to simple binary state and that unused states be treated as dont cares. What happens to the dont cares ?
and what would the transition table would be for the counter including inputs and BCD outputs.
 

WBahn

Joined Mar 31, 2012
29,932
Thanks for your reply. To answer your question Toggle is the output.
If I wish to continue with the exercise by switching state variables to simple binary state and that unused states be treated as dont cares. What happens to the dont cares ?
and what would the transition table would be for the counter including inputs and BCD outputs.
What do you mean by, "switching state variables to simple binary state"? You're table already maps them to a 4-bit state, though why you are using a 4-bit state when you only have three states is a bit of a mystery.

If you have unused states, then you have to decide what to do with them. If you treat them as "don't cares" then, as the name implies, you don't care what state they transition to so you make your design without worrying about what happen if you end up in that state. But you should then document what WILL happen in those states once your design is finished. In the real world, you generally need to give some thought up front as to what behavior is most reasonable in nominally "don't care" conditions and spec the design accordingly.
 

Thread Starter

leodavinci90

Joined Oct 22, 2014
57
Hello, thanks for you reply.
The questions are part of an assignment.
Here is the wording of it
This coursework involves the design and simulation of a synchronous sequential counter using a traditional approach employing small scale logic components and a modern approach using behavioural modelling with VHDL. The design specification for each student is unique and based on their student ID number.

The digits in your ID number, in the left to right order are used to specify the sequential output that a synchronous counter will produce in response to applied clock pulses. Assume that the ID digits are represented in a conventional 4-bit BCD code. The behaviour required of the counter is that it produces a 4-bit digital output that represents the BCD value of the successive digits of your ID number in the left to right sequence above. Once the right hand digit is output the counter will go back to the first and the sequence repeats. Note the digits represent the outputs of the counter and not its state variables. If your ID number is even you must implement the counter with JK flip-flops, if it is odd you should use D-type flip-flops.

-------->>>>>>>>>ID NUMBER = 5820632
1. Traditional design

Draw a state diagram to represent the behaviour of the counter you are required to design. It is suggested you employ the letters of the alphabet to refer to each state and keep the outputs as decimal numbers at this stage.

Insert state diagram here. (2 marks)


Convert the state diagram into its associated state table.

Insert state table here. (2 marks)


Assume that a simple binary state variable allocation can be made and that any unused states can be treated as don’t cares. Draw the corresponding transition table for the counter including flip-flop inputs and BCD outputs for your designated storage device.

Insert transition table here. (4 marks)


Using excitation maps determine the next state logic functions that can be used to drive your flip-flop inputs.

Insert excitation maps clearly showing groups and logic functions here. (6 marks)


Also draw Karnaugh maps to deduce minimal logic functions for the 4 output functions that are required to give the BCD output codes. Note that depending on your ID number not all outputs will be significant in all cases.

Insert the output function maps and logic equations here. (5 marks)


Enter the associated schematic circuit diagram here. (6 marks)
 

Thread Starter

leodavinci90

Joined Oct 22, 2014
57
Just to clarify and remove any ambiguities should they arise my good sir. I have supplied you with the assignment to share its contents and to see for yourself the required tasks if you would offer you kind help. I only state this because I don't wish that I seem I am asking for someone to do my assignment. I am only enquiring on the correct method not the solution.
P. S. I am using another ID now , this is the updated answer for the new ID.
P. S. This message was intended to follow previous one to avoid asking for an attempt as I know the policies and rules in the forum.
State_Diagram_State_Table_New.jpg
 

WBahn

Joined Mar 31, 2012
29,932
Why do you use four state variables?

You are told to use letters and decimal digits in your state diagram (which you did) and then to convert THAT state diagram into the corresponding state table. That means that the state table should use letters and decimal digits, otherwise it doesn't correspond to THAT state diagram. Note that the instructor is simply trying to walk you incrementally along the way using a set of "baby steps", if you will.

The next step is spelled out in the assignment. Namely: Assume that a simple binary state variable allocation can be made and that any unused states can be treated as don’t cares. Draw the corresponding transition table for the counter including flip-flop inputs and BCD outputs for your designated storage device. You've done the first part of this already (albeit it earlier than you were supposed to). You now need to show your best effort to develop a transition table that includes the unused states as well as the BCD outputs. Keep in mind that the point of this is to enable you develop the excitation table for the type of FF you are using in the next step and to do your K-maps in the step after that.
 

Thread Starter

leodavinci90

Joined Oct 22, 2014
57
Allright, thanks for your clarifying reply. I will attempt to do the following tasks tomorrow(it's late Im in a GMT time-zone) and would appreciate your follow-up opinion on the solution later on.
sincere regards.
 

Thread Starter

leodavinci90

Joined Oct 22, 2014
57
I have a question also if you wouldn't mind answering it . Are the homework help forum messages answered by staff members or in addition to that other individuals (albeit qualified or non-qualified) can join in and answer/comment?
 

WBahn

Joined Mar 31, 2012
29,932
I have a question also if you wouldn't mind answering it . Are the homework help forum messages answered by staff members or in addition to that other individuals (albeit qualified or non-qualified) can join in and answer/comment?
Any member is free to respond to any post in any publicly accessible forum. Any exceptions are the result of member-specific sanctions, which are quite rare (except for spammers, who are unmercifully and permanently banned immediately).
 
Top