Hi guys,
I've been given the task to design a multistage transistor amp. Specs given are:
Overall voltage gain: 80 (min) to 100 (max),
Input resistance no less than 1Mohm,
Voltage supplies: +-10V,
Achieve max output voltage swing when Load Resistance is 2kohm,
Capacitive coupling with low freq cut off of no lower than 30Hz but no greater than 60Hz,
Amp must also include negative feedback from final stage to an earlier stage (preference: voltage-voltage/voltage-series).
I have decided on 3 stages, with the input stage being a JFET (Common Source), and the others BJTs. Currently, I am trying to choose the gain of each stage and design as single stage amplifiers:
Stage 1 (JFET-2N3819): Gain = 2 (high input resistance + moderate voltage gain)
Stage 2 (BJT): Gain = 30 (high gain)
Stage 3 (BJT): Gain = 2 (low output resistance + buffer high gain stage; hoping overall gain will reduce to given range above when negative feedback is introduced)
My problem here is I don't know how to tackle such a task. For example, in the input stage, I'm unable to calculate values of my resistors (R1, R2 in voltage divider, RS, and RD), and associated caps for coupling/bypass. I have tried working out small-signal models as well, but to no avail.
Help much appreciated!
I've been given the task to design a multistage transistor amp. Specs given are:
Overall voltage gain: 80 (min) to 100 (max),
Input resistance no less than 1Mohm,
Voltage supplies: +-10V,
Achieve max output voltage swing when Load Resistance is 2kohm,
Capacitive coupling with low freq cut off of no lower than 30Hz but no greater than 60Hz,
Amp must also include negative feedback from final stage to an earlier stage (preference: voltage-voltage/voltage-series).
I have decided on 3 stages, with the input stage being a JFET (Common Source), and the others BJTs. Currently, I am trying to choose the gain of each stage and design as single stage amplifiers:
Stage 1 (JFET-2N3819): Gain = 2 (high input resistance + moderate voltage gain)
Stage 2 (BJT): Gain = 30 (high gain)
Stage 3 (BJT): Gain = 2 (low output resistance + buffer high gain stage; hoping overall gain will reduce to given range above when negative feedback is introduced)
My problem here is I don't know how to tackle such a task. For example, in the input stage, I'm unable to calculate values of my resistors (R1, R2 in voltage divider, RS, and RD), and associated caps for coupling/bypass. I have tried working out small-signal models as well, but to no avail.
Help much appreciated!