1. a) The first access to any cache block/page results in a miss, and called "compulsory misses' - "these are truely compulsory only if we follow on-demand fetching" - Explain.
b) A program accesses each element of a 1024X1024 matrix 8 times in each course of its execution. If the data cache can accommodate 256 matrix elements and 16 matrix elements per block/page, then how many compulsory data cache misses will be caused by this program's execution ?
2.Illustrate the 'diagonal format of encoding micro-instructions for a micro-programmed control unit with an example. Find out the cost optimal micro-instruction format for a system with the following set of micro-instructions and controls. Ensure minimum length of the micro-instruction format as well as the maximum parallelism among the micro-operations.
Microinstructions Control signals
I1 b, e, f
I2 a, b, c, d
I3 a, b, e, h
I4 b, e, g
3.A m/c is being designed whose instructions range from 1 to 6 bytes in width, with 2-bytes instruction being most common and 5- or 6-byte instruction rarely used. Compare the following opcode encoding schemes-
i. The leftmost 3 bits in the first byte of every instruction contains a binary number (1 to 6) that indicates the width of the instruction in bytes.
ii. One-byte instructions begin with 0 in the leftmost bit position of the first byte, 2-byte instructions begins with 10, and all other instructions begin with 11 followed by a 2- bit field that indicates the number of additional bytes (beyond the third) in the instruction.
b) A program accesses each element of a 1024X1024 matrix 8 times in each course of its execution. If the data cache can accommodate 256 matrix elements and 16 matrix elements per block/page, then how many compulsory data cache misses will be caused by this program's execution ?
2.Illustrate the 'diagonal format of encoding micro-instructions for a micro-programmed control unit with an example. Find out the cost optimal micro-instruction format for a system with the following set of micro-instructions and controls. Ensure minimum length of the micro-instruction format as well as the maximum parallelism among the micro-operations.
Microinstructions Control signals
I1 b, e, f
I2 a, b, c, d
I3 a, b, e, h
I4 b, e, g
3.A m/c is being designed whose instructions range from 1 to 6 bytes in width, with 2-bytes instruction being most common and 5- or 6-byte instruction rarely used. Compare the following opcode encoding schemes-
i. The leftmost 3 bits in the first byte of every instruction contains a binary number (1 to 6) that indicates the width of the instruction in bytes.
ii. One-byte instructions begin with 0 in the leftmost bit position of the first byte, 2-byte instructions begins with 10, and all other instructions begin with 11 followed by a 2- bit field that indicates the number of additional bytes (beyond the third) in the instruction.