So you have a GPS module working ?
what you need then is

a UART to receive the NEMA strings,
a state machine to detect the start of the string you want
A way to store the NEMA string you want, whilst calculating the check sum.
a way to send the received string to your PC , if the check sum is received fine.

yes..

 

so as this is homework
we will guide you

first off, I'd suggest you start with the state machine design, as that can be simulated easily
have a go, show us what your thoughts are,

 

so as this is homework
we will guide you

first off, I'd suggest you start with the state machine design, as that can be simulated easily
have a go, show us what your thoughts are,

right now i have used zync ultra scale processor and axi uart-lite.
is there any way to do without using zync ultra proccesor

 

right now i have used zync ultra scale processor and axi uart-lite.
is there any way to do without using zync ultra proccesor

I have attached vivado block design.
Please check uart rx part and is there any way to do without using zync ultra scale processor.
After getting gngga sentence I need to convert tod time to epoch Time.

 

as mentioned, there are many ways to solve this question,
what does you tutor want you to do ?

looks like your new to Zynq,
You might want to look at the MCS in Xilinx,
https://www.xilinx.com/products/design-tools/mb-mcs.html

its a pre working "block" of processor and peripherals you can select in vivado wizards , including a uart,
its pre wired , designed to work,

we were talking about the state machine part of the FPGA design ,
have you decided not to go down this route ?

 

I am looking this way right no

as mentioned, there are many ways to solve this question,
what does you tutor want you to do ?

looks like your new to Zynq,
You might want to look at the MCS in Xilinx,
https://www.xilinx.com/products/design-tools/mb-mcs.html

its a pre working "block" of processor and peripherals you can select in vivado wizards , including a uart,
its pre wired , designed to work,

we were talking about the state machine part of the FPGA design ,
have you decided not to go down this route ?

I am looking for this way.
I have used only uart rx part communication over gps receiver.
Let me clear that is it needed both uart tx and rx for communication..

 

The uarts are easy,

they are off the shelf code,

the hard part that you are going to have to get going , and which will strongly influence how you implement the design is the control state machine.

Its up to you .

 

Los uarts son fáciles

son códigos disponibles,

La parte difícil que tendrás que ponerte en marcha y que influirá fuertemente en la forma en que implementes el diseño es la máquina de estados de control.

Tu decides .
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Buenas tardes, pregunto, ¿se realizó el proyecto?