Hello!

I can't understand how the M-sequence generator is physically implemented.
Specifically, I am interested in how to "shove" the value of a1 / a2 / a3 into the register
(see picture).
In Micro-Cap, I could not simulate work.
I would be grateful for the help!

I am writing with Google translator!

Spoiler: On my language [RUS]

Я не могу понять, как физически реализуется генератор M-последовательности. Конкретно меня интересует то, как "засунуть" в регистр значение a1/a2/a3 (см. картинку). В Micro-Cap/Simulink у меня не вышло смоделировать работу.
Буду благодарен за помощь!

 

Have you considered using a digital multiplexer followed by a transparent D latch in the data path for those three values?

When it is time to load the initial condition, set the multiplexers to select the preset inputs and clock the data into the D latches. Change the multiplexers to select the feedback taps and after the first clock to the generator but before the second set the clock input to the D latches so it can pass the data and then you can happily generate your sequence.

Since the pattern will repeat, do you really need to preload the generator?

 

Have you considered using a digital multiplexer followed by a transparent D latch in the data path for those three values?

Multiplexer? So is it possible? Can an example with a multiplexer, if not difficult?

I figured out the generation! I attach pictures of the generator and the results of its work, as well as the generator itself in the Microcap program.

Spoiler: Picture

Unfortunately, I could not cope with one ambiguity - what is the volume of the M-sequence ensemble? I ran across the following formula:

Then for my case (three-digit register) the ensemble volume is equal to two. And I was able to build as many as four signals that are trans-orthogonal.

File in microcap:
View attachment MLS.rar

Thank you for attention!

 

Please take a minute to look at this datasheet:

http://www.es.co.th/Schemetic/PDF/SN74HC157.PDF

Insert the multiplexer in series with the three terms. The logic for when to enable the mux has not been worked out but if you understand the M-sequence generator (and apparently you do very well) the logic should be easy to work out.

 

But the use of such a multiplexer complicates the scheme, or I misunderstand you.

What is the advantage?

 

The advantage is that is is a solution to the problem posed in the first post of this thread,

 

It seems I figured out the numbering and ensemble!

Spoiler: D-trigger

Spoiler: Shift Register

Spoiler: Ordered graphics

Numbered by the first three (since m = 3) bits:

Spoiler: Number

000 - #0
001 - #1
010 - #2
011 - #3
100 - #4
101 - #5
110 - #6
111 - #7

Micro-Cap:
View attachment M-sequence.rar

Thank you all, now I figured it out!