Generating composite video on NTSC and PAL TV's

Robin Mitchell

Joined Oct 25, 2009
819
I am currently designing a composite monochrome 320 x 240 graphics card for a Z80 system. Here are my resources that I have been studying:

http://www.batsocks.co.uk/readme/video_timing.htm
http://martin.hinner.info/vga/pal.html
http://www.retroleum.co.uk/electronics-articles/pal-tv-timing-and-voltages/
https://www.maximintegrated.com/en/app-notes/index.mvp/id/734

I am using 32K SRAM, a 9572XL CPLD and some external glue logic.
The system uses 16MHz source which is divided into 4Mhz for hsync and vsync generation. The pixel clock is 8MHz to give 320 pixels in 40us of display time (54uS is the display width but I am using the middle of it to ensure all the display is shown).
 

Robin Mitchell

Joined Oct 25, 2009
819
And for those who are interested, each byte in memory is 8 pixels and the 32K ram is split into to buffers which are switchable. I am implementing this because the first graphics card I made flickered everytime I wanted to redraw the display. When the user access the RAM they access the undrawn section and the video driver draws from the other half of memory. Upon receiving the flip signal the memory locations are swapped so the undisplayed section is now displayed and the user can access the other buffer.
 

Thread Starter

PauloConstantino

Joined Jun 23, 2016
266
I am currently designing a composite monochrome 320 x 240 graphics card for a Z80 system. Here are my resources that I have been studying:

http://www.batsocks.co.uk/readme/video_timing.htm
http://martin.hinner.info/vga/pal.html
http://www.retroleum.co.uk/electronics-articles/pal-tv-timing-and-voltages/
https://www.maximintegrated.com/en/app-notes/index.mvp/id/734

I am using 32K SRAM, a 9572XL CPLD and some external glue logic.
The system uses 16MHz source which is divided into 4Mhz for hsync and vsync generation. The pixel clock is 8MHz to give 320 pixels in 40us of display time (54uS is the display width but I am using the middle of it to ensure all the display is shown).
And for those who are interested, each byte in memory is 8 pixels and the 32K ram is split into to buffers which are switchable. I am implementing this because the first graphics card I made flickered everytime I wanted to redraw the display. When the user access the RAM they access the undrawn section and the video driver draws from the other half of memory. Upon receiving the flip signal the memory locations are swapped so the undisplayed section is now displayed and the user can access the other buffer.
Robin can we talk on email ?
 

ian field

Joined Oct 27, 2012
6,536
Is 64K the total memory array for the computer? I ask because if it is holding the video bits as you describe, then 25 lines times 80 characters per line (standard format for computer text on a TV) times 35 (a 5x7 character matrix) = over 13% of the total memory space. If you use a character generator chip (or grow an equivalent subsystem), then the memory usage drops down to 2000 bytes, only about 3%.

In general, your read-and-shift approach is correct. However, there are a couple of different ways to do it, and they affect how much memory is needed and how often it has to be accessed. Also, in the original IBM PC, the CPU clock is derived from the master clock for the NTSC video card. This sorta-kinda established a synchronous relationship between the system memory and the video subsystem, but not really.

ak
The old standard CHR gen chip was something like 2513 - but you'd have to search dusty shelves in a museum.

There may be one in the 68xx family - but anything for the 68xxx is less likely.
 

MrAl

Joined Jun 17, 2014
11,396
Hello,

I did this back in the early 1980's before computers were so popular.

I used one address counter for the vertical and one for the horizontal.
To get a single dot on the screen i used a set of exclusive or gates or as they would be called in this application digital comparators.

If i remember right, there is a catch with NTSC that may or may not exist with PAL, and that is the scan lines are interlaced. That means instead of generating 524 lines down the screen from top to bottom, you have to generate 262 (or whatever) lines every other image line, then the next 262 start from the top again and are every other other image scan line. It's like an interlaced jpg image. So for example if you want to generate a dot that is 2 pixels wide and 2 pixels in height (total 4 pixels making a small square), you have to generate the 2 pixels in the top line first, then wait until 262 more lines have been displayed (or not displayed) and then generate the bottom 2 pixels. So it's not like you generate the 2 top dots and then wait just one scan line and generate the bottom 2 because that would result in 2 dots on top and the next scan line with nothing, and then the 3rd line would have the bottom 2 dots, which would make it look like an 'equals' sign: "=" rather than a square dot.

Dont know if PAL does this though, but you can look it up. It's just called 'interlacing'.
 
Last edited:

ian field

Joined Oct 27, 2012
6,536
Hello,

I did this back in the early 1980's before computers were so popular.

I used one address counter for the vertical and one for the horizontal.
To get a single dot on the screen i used a set of exclusive or gates or as they would be called in this application digital comparators.

If i remember right, there is a catch with NTSC that may or may not exist with PAL, and that is the scan lines are interlaced. That means instead of generating 524 lines down the screen from top to bottom, you have to generate 262 (or whatever) lines every other image line, then the next 262 start from the top again and are every other other image scan line. It's like an interlaced jpg image. So for example if you want to generate a dot that is 2 pixels wide and 2 pixels in height (total 4 pixels making a small square), you have to generate the 2 pixels in the top line first, then wait until 262 more lines have been displayed (or not displayed) and then generate the bottom 2 pixels. So it's not like you generate the 2 top dots and then wait just one scan line and generate the bottom 2 because that would result in 2 dots on top and the next scan line with nothing, and then the 3rd line would have the bottom 2 dots, which would make it look like an 'equals' sign: "=" rather than a square dot.

Dont know if PAL does this though, but you can look it up. It's just called 'interlacing'.
Don Lancaster published a TV Typewriter book that probably covers a lot of the questions on this thread.

On the topic of interlacing; it was originally devised to reduce the video bandwidth. The original UK broadcast was on a carrier somewhere around 50MHz, they were probably planning ahead for more channels and colour information.
 

AnalogKid

Joined Aug 1, 2013
10,990
Don Lancaster published a TV Typewriter book that probably covers a lot of the questions on this thread.
On the topic of interlacing; it was originally devised to reduce the video bandwidth.
There is a link to the book in this thread on another forum.

As for interlacing, it was more to reduce flicker while dealing with the little bandwidth they had, and keeping phosphor decay times short enough to display motion without smearing. Yes, interlacing and information bandwidth are directly related, but it was more how do we get the most out of what we have rather than what can we reduce the bandwidth to and still have something useful. I don't think there was much (if any) excess bandwidth to reduce. 4 MHz was pushing the edge in the 30's.

ak
 

ian field

Joined Oct 27, 2012
6,536
There is a link to the book in this thread on another forum.

As for interlacing, it was more to reduce flicker while dealing with the little bandwidth they had, and keeping phosphor decay times short enough to display motion without smearing. Yes, interlacing and information bandwidth are directly related, but it was more how do we get the most out of what we have rather than what can we reduce the bandwidth to and still have something useful. I don't think there was much (if any) excess bandwidth to reduce. 4 MHz was pushing the edge in the 30's.

ak
The whole thing was a series of compromises - what's your point?
 
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