I understand the principal of how a boost converter works. However, there is one concept i cant get my head around.

When turn the mosfet on and off with a PWM signal. It appears the frequency does not matter as its PWM. What matters is the duty cycle. (unless im missing something)

A PWM signal has an average DC value of just the D% * VMax or say 5V * 50% = 2.5V
When we change the duty cycle the average voltage goes up and down. ok great.

here is where i get lost. The boost voltage is controlled via the Rate of Change or DI of the current.
when i apply a ramping voltage the mosfet gate , the FET stays largely (RDS >>0) resistive until it meets its VGS threshold. However, from there, it turns on pretty quick. No matter how slowing i ramp the mosfet gate on, it seems to quickly turn hard on. Therefore i can not really control the DI/DT of the inductor to adjust the voltage.

I have been testing this with an IRF510 in ORCAD
Right now, the schematic is just a voltage source, inductor and fet. Nothing else. I'm simply trying to prove i can control the inductor kickback essentially.
Ramping the FET on or off does not allow me to control the DI/DT because it quickly turns off and turns on

Is this FET not a good choice to see the inductor behavior?

 

You do not use the switching speed of the MOSFET to control dI/dt. You turn the MOSFET on as quickly as possible for the most efficient operation. The dI/dt are affected by the frequency, duty cycle, value of the inductor and value of the capacitor. It is not what you design for, though. You choose those parameters to get the needed amount of energy transferred to the capacitor during the off part if the cycle and to the load during the in part.

 

when i apply a ramping voltage the mosfet gate , the FET stays largely (RDS >>0) resistive until it meets its VGS threshold.

Normally the Gate is drive on or off and never has a ramp on it.
Here is a good example of the boost PWM running current mode. The error amplifier is not connected but.....

Get a data sheet and read.

 

You do not use the switching speed of the MOSFET to control dI/dt. You turn the MOSFET on as quickly as possible for the most efficient operation. The dI/dt are affected by the frequency, duty cycle, value of the inductor and value of the capacitor. It is not what you design for, though. You choose those parameters to get the needed amount if energy transferred to the capacitor during the off part if the cycle and to the load during the in part.

Thanks for the reply. Not following you tho...
You say in one part " You do not use the switching speed of the mosfet to control the di/dt you turn it on as quickly as possoble"

But then below you say the di/dt is affected by frequency and duty cycle. The frequency of a pwm has almost nothing to do with its average voltage. Its duty cycle does.

So on the one hand you say, you switch the mosfet for efficency and then later say you switch the mosfet to control the di/dt.

Please expalin a bit more if you have the time please. thanks

 

You do not use the switching speed of the MOSFET to control dI/dt. You turn the MOSFET on as quickly as possible for the most efficient operation. The dI/dt are affected by the frequency, duty cycle, value of the inductor and value of the capacitor. It is not what you design for, though. You choose those parameters to get the needed amount of energy transferred to the capacitor during the off part if the cycle and to the load during the in part.

Thinking more about what you said i think i know what you mean..
So its not so much about average voltage on the gate trying to get the resistor to turn on and off slowly because that would but the fet in a high power disipating mode.

Its more about the average "resistance" in a since that is created by the mosfet switching at a certain frequecy between ground and infinite impedance. The average resistance created there is what controls the di/dt or at least partially if I'm understanding what you mean correctly.

 

Resistance is not involved.
dI/dt=V/L is the equation you need (and it works for all switched-mode supplies - you just need to know where to measure V)
You put a fixed voltage (the supply voltage) across the inductor by switching on the FET.
The current will then increase at a rate of V/L where V is the supply voltage.
When the FET switches off, the voltage across the inductor is the difference between the supply voltage and the output voltage: it is negative, so the current decreases at a rate of V/L, where this time V=Vsupply-Vout.

 

Apparently you don’t understand how an inductor works. Put a voltage across it and the current rises at a constant rate. The size of the inductor and the duty cycle determine how much energy goes in to the inductor on each cycle. That is what you need to design for. It needs to be enough energy to power the load for an entire cycle. Clearly, the frequency also affects that amount. The higher the frequency, the less energy needed per cycle. All if these things interact along with the size the capacitor.

 

The whole principal of this boost converter and "boosting" the voltage is dependent on how fast the current through the inductor changes. As you stated, the govering equation being V = L*di/dt

L is fixed. Leaving us only two other variables to change the voltage drop. Since the di is going from a positive current to zero its di is of a negative polarity. Say di = I_final - I_initial or say 0A - 1A = -1A. So the di is also essentially fixed as well as L. So are you saying that the only variable left in the equation that we can control is the dt or the delta time it takes for that known di to change.

At least that is my understanding of the working principal of this device.

If it is in fact dt that we are changing. What is the mechanism used to change the dt. That is the question i am asking.

The only thing we can do is turn the current on and turn it off with the FET. The current is fixed as i previously stated. I was under the impression that how fast the FET turns off and on is what is controlling the dt but as you said, that is not true. The FET needs to turn off and on hard to prevnt power dissipation.

So what is controlling the dt then?
That is the question i am hoping you would be kind enough to answer

 

Δt is the pulse width.
The pulse width is set by the error amplifier.
In a voltage-mode converter (78S40 and derivatives such as MC33063), the pulse width is set directly by the error amplifier output.
In a current-mode converter (UC3842 and derivatives) the pulse-width is set indirectly - the output of the error amplifier is used to set a current limit. The pulse width is set by the time it takes the current to reach the limit set.

ΔI is positive whilst the transistor is ON, and negative when it is OFF.

 

Δt is the pulse width.
The pulse width is set by the error amplifier.
In a voltage-mode converter (78S40 and derivatives such as MC33063), the pulse width is set directly by the error amplifier output.
In a current-mode converter (UC3842 and derivatives) the pulse-width is set indirectly - the output of the error amplifier is used to set a current limit. The pulse width is set by the time it takes the current to reach the limit set.

ΔI is positive whilst the transistor is ON, and negative when it is OFF.

??????
Error amplifier?
There is literally no discussion here on an amplifier.

I am asking what the electrical mechanism is that changes the dt in V = L * di/dt equation.

The only thing switching is a FET. The FET is being turned off and turned on at some frequency. The rise and fall time of the FET is described as ideally 0mS rise and 0mS fall.

When the FET turns on you have some RDS on value and when its off you have some resistance that is ideally infinite. Since the rise and fall of the FET ideally zero, the only thing left is the average on/off of the RDS. If you run the FET at a constant frequency, you will get a constant average resistance to ground. Which is not changing the dt term in the equation.

That is what i am asking.
I am asking what the electrical mechanism is that changes the dt in V = L * di/dt equation.

 

I understand the principal of how a boost converter works. However, there is one concept i cant get my head around.

When turn the mosfet on and off with a PWM signal. It appears the frequency does not matter as its PWM. What matters is the duty cycle. (unless im missing something)

A PWM signal has an average DC value of just the D% * VMax or say 5V * 50% = 2.5V
When we change the duty cycle the average voltage goes up and down. ok great.

here is where i get lost. The boost voltage is controlled via the Rate of Change or DI of the current.
when i apply a ramping voltage the mosfet gate , the FET stays largely (RDS >>0) resistive until it meets its VGS threshold. However, from there, it turns on pretty quick. No matter how slowing i ramp the mosfet gate on, it seems to quickly turn hard on. Therefore i can not really control the DI/DT of the inductor to adjust the voltage.

I have been testing this with an IRF510 in ORCAD
Right now, the schematic is just a voltage source, inductor and fet. Nothing else. I'm simply trying to prove i can control the inductor kickback essentially.
Ramping the FET on or off does not allow me to control the DI/DT because it quickly turns off and turns on

Is this FET not a good choice to see the inductor behavior?

Hello there,

I have to ask where you are getting your information from.

The buck converter has transfer function (Vin might be 5v as in your example):
Vout=D*Vin

as you noted, and the boost converter has a similar transfer function:
Vout=Vin/(1-D)

that is ALMOST the full story, so you start with that.

The catch in both of these is the losses. The losses in the buck are such that the duty cycle will have to be higher than the calculation above. That's not really too critical.
The catch in the boost converter is a little more critical though. The expression above is the ideal transfer function but if there are any losses the duty cycle has to increase just like in the buck, but there is one more little catch. The losses in the circuit means that there is a limit to the duty cycle because once you get past a certain point, the output actually starts to go DOWN. So as you increase the duty cycle, you will see the output go higher and higher, and then you will see it start to decrease. This is the notorious RHP problem with boost circuits. It is because the losses mess up the circuit more than in a buck, and that means you have to stay away from the duty cycle that causes the output to decrease. If you can somehow decrease the losses though then you can go up to a greater duty cycle. So we have to modify the basic expression for the output voltage:
Vout=Vin/(1-D), {D<Dmax}

and Dmax is the maximum duty cycle for that particular circuit. It may be difference for a different boost converter because the losses may not be the same.
There is a way to estimate the Dmax but i'll leave that for another time.

You should really start with the transfer function above though and just keep that problem duty cycle in mind.

 

Hello there,

I have to ask where you are getting your information from.

The buck converter has transfer function (Vin might be 5v as in your example):
Vout=D*Vin

as you noted, and the boost converter has a similar transfer function:
Vout=Vin/(1-D)

that is ALMOST the full story, so you start with that.

The catch in both of these is the losses. The losses in the buck are such that the duty cycle will have to be higher than the calculation above. That's not really too critical.
The catch in the boost converter is a little more critical though. The expression above is the ideal transfer function but if there are any losses the duty cycle has to increase just like in the buck, but there is one more little catch. The losses in the circuit means that there is a limit to the duty cycle because once you get past a certain point, the output actually starts to go DOWN. So as you increase the duty cycle, you will see the output go higher and higher, and then you will see it start to decrease. This is the notorious RHP problem with boost circuits. It is because the losses mess up the circuit more than in a buck, and that means you have to stay away from the duty cycle that causes the output to decrease. If you can somehow decrease the losses though then you can go up to a greater duty cycle. So we have to modify the basic expression for the output voltage:
Vout=Vin/(1-D), {D<Dmax}

and Dmax is the maximum duty cycle for that particular circuit. It may be difference for a different boost converter because the losses may not be the same.
There is a way to estimate the Dmax but i'll leave that for another time.

You should really start with the transfer function above though and just keep that problem duty cycle in mind.

I appreciate your effort to write that out.
I do not understand why no one can answer the following question. I have asked many times and people replying answer every question except the one being asked.

I am asking what the electrical mechanism is that changes the dt in V = L * di/dt equation.

 

I appreciate your effort to write that out.
I do not understand why no one can answer the following question. I have asked many times and people replying answer every question except the one being asked.

I am asking what the electrical mechanism is that changes the dt in V = L * di/dt equation.

Hi,

Oh sorry it sounded like you were asking about the general workings of a boost converter. I gave the most general way to understand them.
It was meant to point out the simplicity and you don't need to know the dv/dt or di/dt or anything like that for the basic versions. You may have to for more advanced versions however.

The 'dt' is the time increment. For that expression 'dt' is said to go to an infinitesimally small value. To understand the basic operation though, you can make 'dt' some small value like 10us or something. If the current changes by 1ma in 10us that means di=0.001 and dt=0.00001 and the division results in di/dt=100, and so the voltage is L*100 for that example.
In a switching converter, 'dt' may be taken to be the pulse width if the output is nearly linear, which it usually is. It will not hold for large values of 'dt' because there are often other considerations such as the output capacitor.

 

??????
Error amplifier?
There is literally no discussion here on an amplifier.

I am asking what the electrical mechanism is that changes the dt in V = L * di/dt equation.

The only thing switching is a FET. The FET is being turned off and turned on at some frequency. The rise and fall time of the FET is described as ideally 0mS rise and 0mS fall.

When the FET turns on you have some RDS on value and when its off you have some resistance that is ideally infinite. Since the rise and fall of the FET ideally zero, the only thing left is the average on/off of the RDS. If you run the FET at a constant frequency, you will get a constant average resistance to ground. Which is not changing the dt term in the equation.

That is what i am asking.
I am asking what the electrical mechanism is that changes the dt in V = L * di/dt equation.

See Post #3. @ronsimpson mentioned the error amplifier both in his reply and the diagram he attached.
The error amplifier has a reference voltage connected to its non-inverting input, and a feedback signal from the output voltage connected to its inverting input, and it amplifies the difference. The output of the error amplifier sets the MOSFET ON-time (which is Δt)

 

dt is set by the period duty cycle, by definition.

V is set by the input voltage (minus the Vds of the MOSFET) during the IN phase and by the supply voltage minus the output voltage (minus a diode drop) during the OFF phase. This can be seen simply by looking at the circuit.

I think what you are misunderstanding is these not being controlled, they are a result of the designed input and output voltages only.

The duty cycle is set to achieve the desired boost ratio. The size of the inductor and capacitor and the frequency are chosen to operate in the continuous mode at a specific ripple voltage for a specific load.

This is all for a continuous mode constant voltage and current in an open loop design. The error amplifier is only used in a closed loop regulated converter.

Since you have not shown a circuit, we are all imagining a different one. How about posting a schematic so we can alk discuss the same circuit?

 

dt is set by the period duty cycle, by definition.

V is set by the input voltage (minus the Vds of the MOSFET) during the IN phase and by the supply voltage minus the output voltage (minus a diode drop) during the OFF phase. This can be seen simply by looking at the circuit.

I think what you are misunderstanding is these not being controlled, they are a result of the designed input and output voltages only.

The duty cycle is set to achieve the desired boost ratio. The size of the inductor and capacitor and the frequency are chosen to operate in the continuous mode at a specific ripple voltage for a specific load.

This is all for a continuous mode constant voltage and current in an open loop design. The error amplifier is only used in a closed loop regulated converter.

Since you have not shown a circuit, we are all imagining a different one. How about posting a schematic so we can alk discuss the same circuit?

Im just considering the ideal boost converter.

 

See Post #3. @ronsimpson mentioned the error amplifier both in his reply and the diagram he attached.
The error amplifier has a reference voltage connected to its non-inverting input, and a feedback signal from the output voltage connected to its inverting input, and it amplifies the difference. The output of the error amplifier sets the MOSFET ON-time (which is Δt)

This is the part that is getting lost in communication I'm trying to get at.

So when we say dt, what dt are we referring to?

dt mean the rise and fall time of the mosfet. Aka, how long does it take for the mosfet to be fully on and or fully off.
That is the dt i thought is generally discussed when we talk about V = L di/dt. However i am thinking that is my confusion??

Or is dt the amount of time the mosfet is actually turned on that is in the V = L di/dt equation?


is dt in this context something else.

 

Thanks, that is what I was talking about.

Can you see that by simple circuit analysis you can determine the voltage across the inductor?

 

Thanks, that is what I was talking about.

Can you see that by simple circuit analysis you can determine the voltage across the inductor?

Yes.... i think

What i am trying to understand is, how the voltage across the inductor gets higher then Vi.
What i do understand is it is simply an explotaiton of the V = L di/dt equation.

The inductor changes polarity and V is very large because dt can change rapidly.
What i dont understand is, what is causing the rapid change in dt.

Is it the rise and fall of the mosfet from hard on to hard off.
Or is it the amount of time it spends in the fully on or off state.

 

dt mean the rise and fall time of the mosfet. Aka, how long does it take for the mosfet to be fully on and or fully off.

No! Not in this context.

When you say dt in th equation:

dI/dt = V/L

It is referring to an infinitesimal delta time, that is calculus.

Because the solution is linear, you can use any dt and the slope if the current vs time remains the same.