# frequency response push pull CMOS as amplifier.

#### Papabravo

Joined Feb 24, 2006
16,810

#### luma

Joined Nov 5, 2015
50
The answer you can find it in post #5

#### crutschow

Joined Mar 14, 2008
27,734
Would you be able to give me a sketch of the characteristic curve Vin vs. Vo in order i can understand where to place the bias point?
Don't ask for something you can do yourself.
Simulate the Vin versus Id for the transistors you have.
From that you can tell how to bias them.
Generally you want a few tens of milliamps of bias.

#### luma

Joined Nov 5, 2015
50
Don't ask for something you can do yourself.
Simulate the Vin versus Id for the transistors you have.
From that you can tell how to bias them.
Generally you want a few tens of milliamps of bias.
Thank you for your answer , but i was talking about the voltage characteristic of the buffer not of the single mosfet. for the curve of the whole buffer there is no sense to plot vin vs id is easier to plot Vo vs Vin (which is the curve i was asking you) and check where the derivative is maximum dvo/dvin there is the place at maximum gain. Actually I already did it but I wanted to compare with your suggestion and discuss on it.

#### crutschow

Joined Mar 14, 2008
27,734
Thank you for your answer , but i was talking about the voltage characteristic of the buffer not of the single mosfet. for the curve of the whole buffer there is no sense to plot vin vs id is easier to plot Vo vs Vin (which is the curve i was asking you) and check where the derivative is maximum dvo/dvin there is the place at maximum gain. Actually I already did it but I wanted to compare with your suggestion and discuss on it.
I know what you are talking about. But, as has been pointed out, the buffer won't work as shown. You can't plot what you want. Trying to get the characteristics of a circuit that doesn't work is pointless.
You need to plot the characteristics of the transistors so you can then determine how to bias them. You want the Vgs needed to get the desired bias current. Then you can design he bias circuit.