Determine Open-Loop Frequency Response and Phase Margin of Circuit with LTSpice

Thread Starter

cake4all

Joined Oct 19, 2018
10
Hi,

I am currently trying to determine the open-loop frequency response of an opamp circuit with LTSpice. For doing this, I used the following videos from Linear Technology and Texas Instruments as reference:
1)
2)

Unfortunately, the results are not plausible. You can see the results of a transient simulation with a step input in the picture "transient1.jpg". A strong overshoot with ringing can be seen, which indicates a low phase margin imho. The corresponding simulation file is "opamp_differentiator.asc".

The AC analysis according to Video (1) is shown in the picture "ac_analysis1.jpg". However, the frequency response is totally implausible because the gain never reaches 0dB, so the phase margin is undefined. According to my understanding, the circuit should be unstable in this situation. (The corresponding simulation file is "opamp_differentiator2.asc".)

The AC analysis according to Video (2) is shown in the picture "ac_analysis2.jpg". According to this result the phase margin is 90°. I think this is implausible, because with such a large phase margin the step response ("transient1.jpg") wouldn't look like this. (The corresponding simulation file is "opamp_differentiator3.asc".)

Apart from the weird simulation results, it also bothers me that both methods give completely different results.

What am I doing wrong?

LT-Spice-Version: 24.0.12 with Whine in Linux
 

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Thread Starter

cake4all

Joined Oct 19, 2018
10
There were problems in both simulations:

Method 1) The capacitor C1 must be connected to the "fb"-node (not the "inm"-node).
Method 2) I plotted the wrong frequency response. V(out) / V(fb) is the A_OL-Loaded frequency response. But the actual important frequency response is A_OL * beta, which corresponds to V(out).
 

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