If I create an op amp integrator, and select R and C such that the corner frequency is 100Khz, what will be the frequency response of two such integrators one after the other?

 

If I create an op amp integrator, and select R and C such that the corner frequency is 100Khz, what will be the frequency response of two such integrators one after the other?

What's the frequency response of the first one alone? Knowing that gets you well on the way to answering your question.

 

Hi -- the first one has cutoff of 100Khz. I was wondering what happens if I put two of those in a row.. Is it still 100Khz, but with faster rolloff?

 

Hi -- the first one has cutoff of 100Khz. I was wondering what happens if I put two of those in a row.. Is it still 100Khz, but with faster rolloff?

Do you know how to write the frequency response (transfer function) in terms of the complex variable s?

 

Do you know how to write the frequency response (transfer function) in terms of the complex variable s?

Not really -- but I believe each integrator will have a function like -1/ST

 

Not really -- but I believe each integrator will have a function like -1/ST

Is this homework? If not, why do you need to determine the frequency response of cascaded integrators?

 

Obviously if one integrator has a -3dB corner of 1kHz, then the rolloff of two in cascade will have a rolloff of -6db at 1KHz.
Also it should be apparent that the rolloff rate of the two will be twice the rolloff rate of one.
So at what frequency would the rolloff be -3dB for two in series?

 

You got some recommendations in an earlier thread: http://forum.allaboutcircuits.com/threads/op-amp-integrator.108396/

for better loop filters than two cascaded integrators. Did you follow the link OBW0549 gave you: http://forum.allaboutcircuits.com/threads/op-amp-integrator.108396/#post-831993

 

yes, thanks -- I did check the microchip software. but presently I'm looking at integrators, and the software doesn't have any options to force that topology (that I could see). Thanks Crutschow

 

For a good filter you want an active-filter configuration not an integrator.

 

If I create an op amp integrator, and select R and C such that the corner frequency is 100Khz, what will be the frequency response of two such integrators one after the other?

A true integrator does not have a "corner frequency." It has a response whose magnitude is Vout/Vin = 1/2πfRC; that is, a steady roll-off at all frequencies without any breakpoint. A single-pole lowpass filter, on the other hand, does have a corner frequency; its response is flat from DC up to that corner frequency, whereupon it begins to descend at a rate of -20db/decade.

If you're actually planning on cascading two integrators (why would you want to do such a thing?), the response of the resulting circuit will be the square of the response for a single integrator, as I gave it above.

If what you're doing is trying to design a multi-pole low-pass filter, use the software that was recommended.

 

http://www.ti.com/lit/an/slyt423/slyt423.pdf

I'm trying to figure out how these sigma-delta converters work, as in the paper (see URL). See page 3, where greater noise shaping is achieved by cascading two integrators.

 

http://www.ti.com/lit/an/slyt423/slyt423.pdf

I'm trying to figure out how these sigma-delta converters work, as in the paper (see URL). See page 3, where greater noise shaping is achieved by cascading two integrators.

Ah. Now I see.

Understanding sigma-delta ADC's is certainly a non-trivial undertaking; I've got half a bookshelf full of books on the subject, and I'd still call my level of comprehension "sketchy."

The cascaded integrators (whether 2, 3, 4 or even more) in a sigma-delta modulator force the bulk of the quantization noise energy up into higher frequencies out of the passband, where it can be more easily filtered out using digital filtering techniques. This is what allows the Σ-Δ converter to simultaneously deliver both high resolution and high output data rate.

Sadly, getting beyond the above cursory explanation involves a whole pile of mind-bending (for me, anyway) math, which I have yet to get my mind around.

 

Well I appreciate your effort here. It's interesting stuff, and I'll see if I can figure it out..

 

I clipped out this old article from EDN magazine years ago and found it helpful in understanding the noise shaping behavior of Σ-Δ converters:

 

http://www.ti.com/lit/an/slyt423/slyt423.pdf

I'm trying to figure out how these sigma-delta converters work, as in the paper (see URL). See page 3, where greater noise shaping is achieved by cascading two integrators.

Hi,

Here is a little more information.

From the drawing we can see that the double integrator cuts frequencies sometimes much more than the single integrator, and when we get up infrequency it really cuts a lot while the single integrator doesnt cut nearly as much. In fact, the ratio of the two outputs would be a straight line ramp that ramps up (or down) as the frequency increases. For this example at w=1 we get a ratio of 1:1 but at w=10 we get 10:1, so the double integrator cuts 10 times as much at w=10. Thus, the high frequencies are attenuated much more.

 

I clipped out this old article from EDN magazine years ago and found it helpful in understanding the noise shaping behavior of Σ-Δ converters:

This is a great article! Thanks so much for sharing it!

 

You're welcome!