I'm not sure, but you could obtain any number you like through the addition of any number that is a power of 2. Just like you can express any number using the decimal notation.Is there a frequency divider from flip flops that can generate a clock with an arbitrary number such as 20, 25 not just 2, 4, 8, 16, 32, 64,...?
For a simple example, consider a divide by three circuit. The output will be zero, one, two, zero, one, two, etc. An output will be generated each time the counter reaches two, so that output would be used to reset the count back to zero.Thanks for the answers!
Could you explain a bit more?
No, I don't want a programmable solution just a simple method using flip flops.You seem to be describing a frequency synthesizer which is a very common building block.
The Google Search:
Yes, that will do the job but I don't want to use any chip. Maybe I just need to read the structure used in the chip.What you are describing is generally called a "divide by N" counter. A common chip used for this is a 74193 (TTL logic) programmable up/down counter. You load in the divide by number and clock the down pin. Do a google search for a 74193 or "divide by N counter", for more info.
If that's the case, then I strongly suggest you download Digital Works. It's a free digital electronics simulator software that allows you to build logic layouts using the most commonly available gates and flip-flops to create any logic process that you want. And it's also an extremely powerful learning tool.Yes, that will do the job but I don't want to use any chip. Maybe I just need to read the structure used in the chip.
No. Use the created clock as the reset of the counter.Do you mean that we use the reset signal of counter as the created clock?
Feed a flip flop configured as a 1-bit counter with 2X frequency you want (derived from the counter/decoder we discussed.) The f/f will divide the freq by 2 and guarantee 50% duty.I see that the clock doesn't have a 50% duty cycle. How can I get a 50% duty cycle?
Once can use !BO for the generated clock (not 50%Duty Cycle) and also to reload the start value. Or, load MAX COUNT - count(frequency), count up and use !CO.What you are describing is generally called a "divide by N" counter. A common chip used for this is a 74193 (TTL logic) programmable up/down counter. You load in the divide by number and clock the down pin. Do a google search for a 74193 or "divide by N counter", for more info.
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