Completed Project Pspice frequency divider D flip flop

Thread Starter

drakedog2

Joined Sep 24, 2014
17
I am having a problem when I tried to simulate the frequency divider. Here's what I designed:
View attachment 246792
and here is the simulation:
1630189034781.png

it's pretty basic design. However, where did I make the mistake. I tried to add 999k in seriers resistor behind output and replace 7474 with 74hc and 74als but it didnt help.
Thank you for the help!
 

bertus

Joined Apr 5, 2008
21,587
Hello,

To start with, you are using a digital chip to process an analog signal.
The digital chip can not work on the negative part of the signal.
Also the rise and fall times are to slow from the analog signal.
First process the analog signal to have a digital signal for the D-flipflop.
This can be done using a comparator or schmitt trigger circuit.

Bertus
 

Papabravo

Joined Feb 24, 2006
16,938
Yeah. Flip-flops like the 7474 don't work with CLK inputs that are sinewaves that swing between +5V and -5V. Try a square wave that goes between 0V (GND) and +5V. Where did you learn about TTL devices? If it was an online resource, I'd like to help the author clarify his information.
 

Papabravo

Joined Feb 24, 2006
16,938
Top