Dear all,

as part of a semester long project I am designing a phase locked loop, which will then be simulated and constructed. I'm having difficulties with the frequency divider, as I don't seem to have enough background knowledge on the implementation of flip flops. I've understood and created the basic layout of a frequency divider (interconnected d flip flops) as shown below. However, ideally the frequency divider should be adjustable. I'm sure this could be achieved using a potentiometer but I'm not sure how to implement this idea. Anything to point me in the right direction would be greatly appreciated!

 

Frequency division cannot be continually adjusted without exceedingly complicated circuitry. What you can do with a simple binary divider is to use 1, 2, 3...etc. stages of division and a switch to select where you take the output from. This will give you division ratios of 2, 4, 8...etc.

 

thank you so much, that would be perfect. I am struggling on the implementation though. Would it make sense to use a multiplexer to switch between the different outputs? I'm sure there is a simple solution involving a basic switch but so far I have only found an on/off switch in my simulation program

 

I can't help you with your simulation program but if there isn't a multipole switch you could use a series of on-off switches with only one being switched on.

 

I am struggling on the implementation though. Would it make sense to use a multiplexer to switch between the different outputs? I'm sure there is a simple solution involving a basic switch but so far I have only found an on/off switch in my simulation program

This is Homework Help. You need to show your best effort so members can help you with what's tripping you up.

It would also help if you bound the solution space. How many and what ratios do you want selectable? Are they all integer?

You should stop saying you're sure when you aren't...

 

However, ideally the frequency divider should be adjustable. I'm sure this could be achieved using a potentiometer

It can, using a pulse integrator followed by a comparator. The potentiometer adjusts the integration rate.

 

It can, using a pulse integrator followed by a comparator. The potentiometer adjusts the integration rate.

What?

 

Pulses can be integrated on a capacitor. The pot controls the charging current. When the cap voltage reaches a threshold set in the comparator the cap gets discharged. Rinse and repeat.
I have a simple circuit design to do this, but since this is Homework Help the TS would need to devise one too.
Here are the relevant waveforms :

 

Pulses can be integrated on a capacitor. The pot controls the charging current. When the cap voltage reaches a threshold set in the comparator the cap gets discharged. Rinse and repeat.

It is still dividing by an integer ratio and changing in steps not smoothly.

 

Perfectly true, but the TS didn't specify 'smoothly'.

 

It will also jitter at the crossovers between divide ratios.
You could use a frequency to voltage converter followed by a voltage to frequency converter with a pot to set the gain of either (or both) and get a smoothly varying ratio. I have no idea how well that would work as the divider in a PLL system though.

 

It will also jitter at the crossovers between divide ratios.

Yes. That might not be acceptable.