You don't seem to understand the concept of how many states can be encoded with a given number of bits -- it may just be a language issue. We'll get through it.

Let's say that I have N lights that are either on or off arranged in a row. I tell Bob that if he sees a specific pattern of on/off lights that it is his turn to do something. I till Sue that if she sees a different pattern that it is her turn. If every possible pattern of on/off (including all on or all off) signals exactly one unique person that it is their turn, how many people can I assign a pattern to?

# of lights: # of people
1: 2 people
2:
3:
4:
...
8:

fill in the table for those four entries.

In terms of N, how do you calculate the number of possible patterns?

 

You don't seem to understand the concept of how many states can be encoded with a given number of bits -- it may just be a language issue. We'll get through it.

Let's say that I have N lights that are either on or off arranged in a row. I tell Bob that if he sees a specific pattern of on/off lights that it is his turn to do something. I till Sue that if she sees a different pattern that it is her turn. If every possible pattern of on/off (including all on or all off) signals exactly one unique person that it is their turn, how many people can I assign a pattern to?

# of lights: # of people
1: 2 people
2:
3:
4:
...
8:

fill in the table for those four entries.

In terms of N, how do you calculate the number of possible patterns?

# of lights: # of people
1: 2 people
2: 4 people
3: 8 people
4: 16 people
...
8:

 

Let us try a different approach.

I have a coin. I flip it into the air once and it lands on the floor.
How many different ways can it land on the floor?

combination question answer 2

 

combination question answer 2

Good.
Now I have two light switches on the wall. How many different ways of ON/OFF can I have the switches?
SwitchA SwitchB

 

Good.
Now I have two light switches on the wall. How many different ways of ON/OFF can I have the switches?
SwitchA SwitchB

Swich 1 (2)
Swich 2 (2.2=4)

 

Swich 1 (2)
Swich 2 (2.2=4)

Good. Each different pattern is called a state.
Now fill in the table for one switch, two switches, three switches, all the way to eight switches:

Number of switches -> Number of states
1 -> 2
2 -> 4
3 ->
4 ->
5 ->
6 ->
7 ->
8 ->

 

Good. Each different pattern is called a state.
Now fill in the table for one switch, two switches, three switches, all the way to eight switches:

Number of switches -> Number of states
1 -> 2
2 -> 4
3 ->
4 ->
5 ->
6 ->
7 ->
8 ->

Number of switches -> Number of states
1 -> 2
2 -> 4
3 ->8
4 ->16
5 -> 32
6 -> 64
7 -> 128
8 -> 256

 

Number of switches -> Number of states
1 -> 2
2 -> 4
3 ->8
4 ->16
5 -> 32
6 -> 64
7 -> 128
8 -> 256

Brilliant!
Now one switch = one flip-flop.
How many flip-flops do you need if there are only four states?

 

Brilliant!
Now one switch = one flip-flop.
How many flip-flops do you need if there are only four states?

16

 

16

Look at the table again.
Switches in the left column.
States in the right column.

 

btw, maybe you need to have a rest now.
We can continue in the morning.

 

Look at the table again.
Switches in the left column.
States in the right column.

For 4 states 2 Flip Flop

 

For 4 states 2 Flip Flop

Here are your four states using four flip-flops:

Flip-flops
D C B A
0 0 0 0
0 1 1 0
0 1 0 0
0 0 1 0

Four flip-flops D, C, B, A are shown.
There are only four states.
You only need two flip-flops.
Which two flip-flops do you need?

Don't answer the question now.
Go get some sleep and come back in the morning.

 

For 4 states 2 Flip Flop

Yes.

Now, could you design a synchronous JKFF-based circuit using two flip flops that simply counts in the normal binary sequence of

00->01->10->11

Remember, synchronous means that the same clock signal goes to the clock input of all of the FFs in the circuit.

Notice that this isn't precisely the problem you are trying to solve. I'm trying to get at whether we need to take a step back and look at how you design synchronous FF circuits at all, or whether it is merely the different sequence that is causing the problem.

 

Yes.

Now, could you design a synchronous JKFF-based circuit using two flip flops that simply counts in the normal binary sequence of

00->01->10->11

Remember, synchronous means that the same clock signal goes to the clock input of all of the FFs in the circuit.

Notice that this isn't precisely the problem you are trying to solve. I'm trying to get at whether we need to take a step back and look at how you design synchronous FF circuits at all, or whether it is merely the different sequence that is causing the problem.

 

Okay, I'm glad we went down this road. You don't understand what a synchronous counter is. So let's deal with that.

You have shown an asynchronous counter, which means that the flop flops are not all clocked by the same signal. You have the left FF being clocked by the CLK signal, however the right FF is being clocked by the Q output of the left FF. This particular asynchronous counter is better known as a ripple counter.

Asynchronous circuits have advantages, but there are also LOTS of demons swimming in those waters, most notably race conditions and glitches that can cause all kinds of bad behavior. Things like ripple counters are often the first sequential state machines that people learn because they are easy to understand and implement. But usually shortly thereafter you move to synchronous state machines and that is where you should spend the bulk of your time.

The problem you have been given strongly implies that this is the case for the course you are taking since it was very specific in asking for a synchronous circuit. That means that the first thing you need to do is apply the one-and-only CLK signal to the clock input on EVERY FF. You then proceed to design the "excitation logic" for each input of each FF so that the FF does what it is supposed to at EACH clock pulse, including the bulk of the time when what it should do is absolutely nothing (i.e., maintain the same state).

Another bad thing you are doing is floating some of the inputs to your chips, namely the S and R inputs. You've tied the R inputs together, but you are not driving them. While many simulators are forgiving of this sin, the real world isn't. ALWAYS drive EVERY input of EVERY chip (unless you have a very good and specific reason for not doing so and KNOW that it is okay to do so).

 

Okay, I'm glad we went down this road. You don't understand what a synchronous counter is. So let's deal with that.

You have shown an asynchronous counter, which means that the flop flops are not all clocked by the same signal. You have the left FF being clocked by the CLK signal, however the right FF is being clocked by the Q output of the left FF. This particular asynchronous counter is better known as a ripple counter.

Asynchronous circuits have advantages, but there are also LOTS of demons swimming in those waters, most notably race conditions and glitches that can cause all kinds of bad behavior. Things like ripple counters are often the first sequential state machines that people learn because they are easy to understand and implement. But usually shortly thereafter you move to synchronous state machines and that is where you should spend the bulk of your time.

The problem you have been given strongly implies that this is the case for the course you are taking since it was very specific in asking for a synchronous circuit. That means that the first thing you need to do is apply the one-and-only CLK signal to the clock input on EVERY FF. You then proceed to design the "excitation logic" for each input of each FF so that the FF does what it is supposed to at EACH clock pulse, including the bulk of the time when what it should do is absolutely nothing (i.e., maintain the same state).

Another bad thing you are doing is floating some of the inputs to your chips, namely the S and R inputs. You've tied the R inputs together, but you are not driving them. While many simulators are forgiving of this sin, the real world isn't. ALWAYS drive EVERY input of EVERY chip (unless you have a very good and specific reason for not doing so and KNOW that it is okay to do so).

 

You are still leaving the S and R inputs floating. If you get into this habit, I can guarantee that you will come to grief sooner or later (probably sooner).

Other than that, this should work.

What is the purpose of the AND gate, given that one of the inputs is fixed at a HI level?

Now, let's just mix up the order that we want to go through the states. How about

00->10->11->01

Can you redesign the circuit to do that?

 

You are still leaving the S and R inputs floating. If you get into this habit, I can guarantee that you will come to grief sooner or later (probably sooner).

Other than that, this should work.

What is the purpose of the AND gate, given that one of the inputs is fixed at a HI level?

Now, let's just mix up the order that we want to go through the states. How about

00->10->11->01

Can you redesign the circuit to do that?

I'm correcting the s and r entries.

how do I design it in the form of?

00-> 10-> 11-> 01

 

I'm correcting the s and r entries.

how do I design it in the form of?

00-> 10-> 11-> 01

How did you design it in the sequence

00 -> 01 -> 10 -> 11