Short story: I need documentation about how FT2232H based programmers for Lattice CPLDs/FPGAs wire the FT2232H signals.
Long story: read below.
I am designing a system containing:
I want the end user to be able to easily program these 3 elements, so I am integrating an FT2232H chip on the PCB for this task. In addition to programing these 3 chips, I want to use the FT2232H for the STM32 to talk with the host PC (using SPI).
Currently I have managed to program all these items one by one using an FT2232H board:
Does this approach make sense?
Does anyone have information about lattice programmer signals (other than the typical TCK, TDI, TDO & TMS) and how they are mapped to the FT2232?
BTW, other option I might try is using an FT4232 instead of an FT2232, but I would like to try with the FT2232 first.
Long story: read below.
I am designing a system containing:
- An ATtiny;
- A Lattice MachXO CPLD; and
- An STM32 MCU.
I want the end user to be able to easily program these 3 elements, so I am integrating an FT2232H chip on the PCB for this task. In addition to programing these 3 chips, I want to use the FT2232H for the STM32 to talk with the host PC (using SPI).
Currently I have managed to program all these items one by one using an FT2232H board:
- The ATtiny using avrdude.
- The CPLD using Lattice programmer.
- The STM32 using OpenOCD (SWD interface).
- Use A bus to program the 3 chips.
- Use B bus to communicate STM32 with PC (this way I can debug using bus A while PC and STM32 communicate).
- Wire TCK/SCK, TDI/MOSI and TDO/MISO together to the corresponding pins of the 3 elements to program.
- Map a different TMS/CS pin for each of the 3 elements (a TMS pin for the CPLD, a CS pin for the Attiny connected to the chip reset, and another pin as the enable signal for the SWD interface tristate buffers).
- Use each corresponding software to make sure all unused TMS/CS pins are deactivated.
- When programming the CPLD, use TMS, and ensure that CS keeps the AVR in reset, and the SWD enable disconnects the buffers.
- When programming the AVR, make sure TMS disables CPLD JTAG interface, and SWD buffers for STM32 are high Z.
- When programming the STM32, keep the AVR in reset and the CPLD JTAG disabled.
Does this approach make sense?
Does anyone have information about lattice programmer signals (other than the typical TCK, TDI, TDO & TMS) and how they are mapped to the FT2232?
BTW, other option I might try is using an FT4232 instead of an FT2232, but I would like to try with the FT2232 first.