FIR FILTER

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
Hello everybody

I'm here to ask you for your opinion.

in practice I have an ADC that has its own reference voltage. To this reference voltage, when the temperature reaches a certain value, a ripple of 128mVpp and a freq equal to 10khz are added. The data that the ADC converts, including the core temperature, I send them over the CAN to view. But when you add this ripple the values that are plotted are out of order.

I cannot add a HW filter to the reference output because the card has already been made.

A colleague proposed to put a FIR filter on the samples converted by the ADC, before being sent over CAN. But in my opinion this does not make sense, because I apply the filter on an analog signal which I then sample and filter and not on digital samples?

Quite right ?

Thank you
 

andrewmm

Joined Feb 25, 2011
1,754
Are you intending to add the ripple / noise when you get to a certain temperature?

What analog filtering do you have in front of the ADC,
what is your ADC sampling rate ?
what is the bandwidth of the reference input to your ADC chip ?

Is it a SAR or flash or what type of ADC ?

What do you mean by values are out of order ?

Is this plotting you mention of the ADC output , or after its gone down the CAN bus ?
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
Are you intending to add the ripple / noise when you get to a certain temperature?

What analog filtering do you have in front of the ADC,
what is your ADC sampling rate ?
what is the bandwidth of the reference input to your ADC chip ?

Is it a SAR or flash or what type of ADC ?

What do you mean by values are out of order ?

Is this plotting you mention of the ADC output , or after its gone down the CAN bus ?

Hello and thank you for your reply.

When the component that generates the reference voltage for the ADC (xadc internal to the zynq) reaches a temperature of about 92 degrees to its direct component of 1.25V, a ripple of 128mV is added to a freq of 10khz. When this ripple appears the converted digital values are floating.

ADC sample rate is 1000ksps.
 

andrewmm

Joined Feb 25, 2011
1,754
what is the temperature grade of the parts that you are using to make the vref ?

Its not clear if you're intending to add this ripple to the ref, or is it un intentional ?

what is the ADC and the Vref source ?
is the whole design up at 95 degrees C or "just" the Vref
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
what is the temperature grade of the parts that you are using to make the vref ?

Its not clear if you're intending to add this ripple to the ref, or is it un intentional ?

what is the ADC and the Vref source ?
is the whole design up at 95 degrees C or "just" the Vref

then I'm doing some tests in the climatic chamber. I inserted the thermocouple probe on the component, U22, which generates the vref de l'xadc inside the zynq. also I connected the output of U22 to the oscilloscope. during the climatic chamber test I monitor the core temperature of the zynq and that of U22. When the temperature of U22 reaches 90 degrees, if I perform a power cycles on the oscilloscope I see, superimposed on the Vref = 1.25V, a ripple of 128mVpp and freq 10khz. I've been clear ?

Thank you
 

andrewmm

Joined Feb 25, 2011
1,754
then I'm doing some tests in the climatic chamber. I inserted the thermocouple probe on the component, U22, which generates the vref de l'xadc inside the zynq. also I connected the output of U22 to the oscilloscope. during the climatic chamber test I monitor the core temperature of the zynq and that of U22. When the temperature of U22 reaches 90 degrees, if I perform a power cycles on the oscilloscope I see, superimposed on the Vref = 1.25V, a ripple of 128mVpp and freq 10khz. I've been clear ?

Thank you
Can you answer the above questions ?
I have no idea what a U22 chip is ,
 

Ian0

Joined Aug 7, 2020
3,244
Is the device that produces the reference (is this U22?) going unstable as temperature increases? If that is the case, it must be very close to the limit of stability at normal operating temperature.
What is the part number of U22?
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
Is the device that produces the reference (is this U22?) going unstable as temperature increases? If that is the case, it must be very close to the limit of stability at normal operating temperature.
What is the part number of U22?

Yes, I entered the name U22 just to write a more understandable description.

PN is REF3112.
 

Ian0

Joined Aug 7, 2020
3,244
I've not had any experience of the REF3112, and the datasheet doesn't suggest that it has stability problems (unlike the good old TL431!) - "stable into any capacitive load" it says; and it works up to 125°C, so I think we can stop blaming the reference!
It's only got 46dB of PSRR at 10kHz, but that would require 24V of 10kHz ripple on the input to get 128mV on the output, so we can discount that as well.

All the application circuits show a RC filter on the output, generally 10Ω/22μF.

Could you measure the ripple waveform on the 'scope and post it. There are a lot of clues to be had from the shape of the ripple.
Or, are you thinking that getting rid of the ripple is a lost cause and you just want the best way of ameliorating it further down the line?
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
I've not had any experience of the REF3112, and the datasheet doesn't suggest that it has stability problems (unlike the good old TL431!) - "stable into any capacitive load" it says; and it works up to 125°C, so I think we can stop blaming the reference!
It's only got 46dB of PSRR at 10kHz, but that would require 24V of 10kHz ripple on the input to get 128mV on the output, so we can discount that as well.

All the application circuits show a RC filter on the output, generally 10Ω/22μF.

Could you measure the ripple waveform on the 'scope and post it. There are a lot of clues to be had from the shape of the ripple.
Or, are you thinking that getting rid of the ripple is a lost cause and you just want the best way of ameliorating it further down the line?

Hello and thanks for the reply.

The waveform is as follows.
IMG_3216.JPG
Unfortunately, I cannot intervene on the HW because the card has already been made, so they asked me if it was possible to filter the discrete samples coming out of the xadc.

PS: When I have the ripple on the reference output also the digital samples coming out of the xadc are floating. Precisely for this reason I wanted to know if it was possible to insert a FIR filter, written in C, directly on the discrete samples.

1.JPG

But I ask myself: does it make sense to filter discrete samples with a FIR filter?

Thank you
 

Ian0

Joined Aug 7, 2020
3,244
But I ask myself: does it make sense to filter discrete samples with a FIR filter?
Yes, but it would take much less code to do it with an IIR filter. You can implement it with 5 instructions in ARM.
LDR R0,[output value]
LDR R1,[data from ADC]
SUBS R0,R0,R0,LSR #n
ADDS R0,R0,R1
STR R0,[output value]

But before you start - what is the ADC sample rate? What is the maximum frequency of interest in the signal? (What does the signal represent?) What is the part number of the ADC? What would be the loop repetition rate i.e. the software that uses the output value.
Could you synchronise the sampling with the interference? If so it will disappear! What's going on inside your unit at 10kHz? Does the frequency vary with temperature? I'm thinking that 9.94kHz is too close to a round 10kHz to be a coincidence. You also don't want the 10kHz to show up as an alias somewhere.
 

andrewmm

Joined Feb 25, 2011
1,754
Problem with a filter is ,
its tuned for this sample of the board,

If you don't know the source of the reference noise, then how can you guarantee that its going to stay constant on all boards,
so it might change to a different higher / lower frequency. and your filter might then do nothing or actually amplify the noise.


Engineering is about measuring the problem, understanding a sauce, then engineering a solution,
in this case main route I would look at is to get rid of noise at source.


On basis these ref chips re rated way past the point that they cause you problem
are you measuring the chamber temperature or the temperature at the ref chip ?
What's the ADC , does its ref input need a buffer, is it rated at the temprature your getting the ADC to ?

One would have to ask, what is the providence of the ref chip ?
It sounds liek you might have a grey import there, did it come from an authorised distributor.
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
The xadc rate I saw from the Vivado settings and it is set at 1000ksps.


What is the maximum frequency of interest in the signal?
If you mean the noise signal, that is the ripple superimposed on the reference, as a frequency it remains around the one indicated in the image.

What would be the loop repetition rate i.e. the software that uses the output value.
So I am using freertos on the xilinx sdk tool.
1) I have a task that every 100ms reads me a sample from the xadc, which then converts it into degrees, and saves it to me in a structure.
2) A task that every 1ms reads me the sample saved in the structure, of point 1, and saves it to me in a datablock.
3) The sample saved in the datablock with a frequency of 50 hz sends it on CAN

Could you synchronise the sampling with the interference? If so it will disappear!
You mean, that i have to set the sample freq equal to the freq of the ripple noise ?

What's going on inside your unit at 10kHz? Does the frequency vary with temperature?
The freq of the ripple is stable at 9.94 khz.

I'm thinking that 9.94kHz is too close to a round 10kHz to be a coincidence.
What do you mean ?

Thank you
 

andrewmm

Joined Feb 25, 2011
1,754
As an aside,
We once had a new engineer, long time ago, back in days of logic chips,
doing a small few logic chip design,
he asked around how to get rid of a "glitch" , we all assumed it was on the PSU, so we said , capacitance / decoupling,
about a year later, I was debuging a system problem, in what was a horrible customers environment, think sea sick.

Turned out the "bug" was the engineer had put loads of capacitors around all the logic line, to get the results he wanted( back in those days it was only he's ),
effectively , skewing the signals to "get rid of glitches" , instead of gating and registering signals as normal.

and guess what , ... it now failed spectacularly ,

note 1:
always implement system and circuit reviews, no matter how small the circuit is,
note 2:
identify the cause of the glitches woudl have told him they were expected, and not to filter them out but design system
 

Ian0

Joined Aug 7, 2020
3,244
in this case main route I would look at is to get rid of noise at source.
This is the highest priority.
Is it a ground noise problem? Something that's oscillating tends to be more sinusoidal and less triangular!
Are you measuring directly across the reference? Is there power in the ground tracks?

I have a task that every 100ms reads me a sample from the xadc
Do you mean 100μs? it seems odd to save the data 100 times more often than you read it? If you read it every 100ms but transmit it by can every 20ms, surely you will be sending 5 identical readings?

Why are you sampling at 1Msample/second when you are only reading one sample in 100,000? Each sample will cause variations in power supply current: generating 1MHz signals on an analogue+logic board when you don't have to seems like a recipe for trouble.

You have an event that happens at 1kHz, and an event that happens at 1MHz, is there another event that happens at 10kHz that causes the interference?
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
The temperature of the core of the zynq is calculated internally of the chip, i can only monitor his output discrete sample.

I agree with you that it would be better to delete it at the source but unfortunately it is not possible.

So I was asked to evaluate if it makes sense to do this on the adc output samples by inserting a digital filter. The question is this. !!!
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
Do you mean 100μs? it seems odd to save the data 100 times more often than you read it? If you read it every 100ms but transmit it by can every 20ms, surely you will be sending 5 identical readings?

Why are you sampling at 1Msample/second when you are only reading one sample in 100,000? Each sample will cause variations in power supply current: generating 1MHz signals on an analogue+logic board when you don't have to seems like a recipe for trouble.

You have an event that happens at 1kHz, and an event that happens at 1MHz, is there another event that happens at 10kHz that causes the interference?

I'm perfectly agree with you. Unfortunately, the situation is to evaluate whether a point intervention with digital filter is possible, otherwise it is necessary to overturn the system a little.

So keep in mind that my questions always refer to an extreme intervention, if possible, in order not to intervene on the whole project.

Thank you
 

Thread Starter

Lorenzo Ruscitti

Joined Nov 12, 2018
33
Why are you sampling at 1Msample/second when you are only reading one sample in 100,000?
Shouldn't it be 1,000,000 instead of 100,000?

Shouldn't it be 1,000,000 instead of 100,000?

I'm reading 10 samples per second out of 1 000 000, right?

Because I read every 100ms, so 100ms * 10 = 1s.
 
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