extracting cgg and dgs from LTSPICE simulation model

Papabravo

Joined Feb 24, 2006
20,985
I think you meant gds. The quantity dgs does not appear to be a MOSFET property. A discussion of gds as the inverse of rout is contained in the following article.

https://en.wikipedia.org/wiki/MOSFET

As for cgg, it appears so be the parallel combination of cgs with the series combination of cgd and cds.
Also remember that cds gets shorted out when the MOSFET is on.
I hope that helps.
 

Thread Starter

yef smith

Joined Aug 2, 2020
689
Hello Papabravo, gds is the derivative of the current by vds.
for Ft plot ineed the Cgg i have found another formula
my spice model is shown bellow.
so Cgg=Cgs0+Cgd0+Cgb0
in my model its
+CGDO = 8.23E-10 CGSO = 8.23E-10 CGBO = 1E-12
Alll the capacitances are in parralell, as shown bellow.
I am correct?
Thanks.


CGSO Gate-source overlap
capacitance/channel width
CGDO Gate-drain overlap
capacitance/channel width
CGBO Gate-bulk overlap
capacitance/channel width

https://sanjayvidhyadharan.in/Downloads/tsmc_180_nm/tsmc018.lib
https://www.seas.upenn.edu/~jan/spice/spice.MOSparamlist.html
1671268555909.png
1671268287793.png

1671273701434.png
1671268826050.png
 

Audioguru again

Joined Oct 21, 2019
6,604
I could not find a datasheet for that Mosfet. The Model has no minimum and maximum specs, probably just "typical" specs.
The DC simulation here does not care about capacitance.
 
Top