Extracting AC output voltage ripple and adding DC offset for ADC input

Thread Starter

SiCEngineer

Joined May 22, 2019
390
Hello,

I have designed a high voltage output (6000V) supply using a fly-back converter. I need to measure the output voltage with a DSP, but the output voltage must be at most 0.1V. This is not achievable with the 12-bit or 16-bit single ended/differential sensors on the TI DSP board that I am using to control it. I instead want to extract, measure, and amplify the output voltage ripple and use that within the control system. The method I have used is the most simple, but it doesn't seem to be performing as I desire. I will attach an .asc simulation of the circuit. It seems that the DC offset is not being added to the AC ripple - I am using a 3V supply and two 10K resistors to offset by 1.5V, which is the mid-range of the ADC input of 0-3V.

Is there a better way to do this, or any suggestions to improve this existing circuit? Can anyone help me understand what is going wrong? This is the most simple method I know of adding DC offset.

SiC
 

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ericgibbs

Joined Jan 29, 2010
15,338
hi si,
First noted the +3Vout requirement, using a +/-3v supply will not allow a +3V out swing, note the image for a +5V, the voltage out limits.
Also noted the first OPA output is limited, no longer a sine wave.
Will continue checking.
E
EG 1206.pngEG 1205.png
 

Thread Starter

SiCEngineer

Joined May 22, 2019
390
hi si,
First noted the +3Vout requirement, using a +/-3v supply will not allow a +3V out swing, note the image for a +5V, the voltage out limits.
Also noted the first OPA output is limited, no longer a sine wave.
Will continue checking.
E
View attachment 256903View attachment 256904
Thanks for the help! Just a note, I chose a "random" op-amp that had a high bandwidth just to check the circuit. No problem if a different one would be better suited to the job. I actually have +/-15V supplies on the board, but planned to use regulators to change this to +/-3V just so that I can clamp the output to the ADC range.
 

Thread Starter

SiCEngineer

Joined May 22, 2019
390
hi Si,
This is the bare-bones response, badly distorted.
You need a rail to rail OPA or higher voltage supplies.
E
View attachment 256905
That makes sense. I'll get on t
hi Si,
This is the bare-bones response, badly distorted.
You need a rail to rail OPA or higher voltage supplies.
E
View attachment 256905
I noticed that you took the Zener diode out, and so I did too, and now I get a response exactly as above. Not sure why that was affecting the response, as it was just there to protect the op-amp. I'll get on to looking at different op-amps now. Thanks!
 

MisterBill2

Joined Jan 23, 2018
11,579
Why does removing the zener change things? It is because a zener diode also conducts in the forward direction, like a regular diode, slightly different forward drops. So previously the image was not quite correct. Also, with the capacitor coupling in two places that is two high pass filters, which will certainly have an effect on the ripple, which will not be a sine wave. Use the inverting input of an opamp to set the offset where it needs to be.
 

Thread Starter

SiCEngineer

Joined May 22, 2019
390
Why does removing the zener change things? It is because a zener diode also conducts in the forward direction, like a regular diode, slightly different forward drops. So previously the image was not quite correct. Also, with the capacitor coupling in two places that is two high pass filters, which will certainly have an effect on the ripple, which will not be a sine wave. Use the inverting input of an opamp to set the offset where it needs to be.
I have replaced the standard voltage divider now for an op-amp in adder configuration instead. I understand that the ripple will not be a sine-wave, but I am using a standard sine just to test the principle of the control method. I have attached a .asc LTSpice simulation of the control scheme with a simple boost converter, again just to test the principle. Still having some issues with the controller. That additional capacitor is there, because I read that when adding a DC offset the capacitor stops flow of DC current in the wrong direction.

Hopefully with the schematic what I am trying to achieve may become a little bit more clear...

SiC
 

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MisterBill2

Joined Jan 23, 2018
11,579
I have replaced the standard voltage divider now for an op-amp in adder configuration instead. I understand that the ripple will not be a sine-wave, but I am using a standard sine just to test the principle of the control method. I have attached a .asc LTSpice simulation of the control scheme with a simple boost converter, again just to test the principle. Still having some issues with the controller. That additional capacitor is there, because I read that when adding a DC offset the capacitor stops flow of DC current in the wrong direction.

Hopefully with the schematic what I am trying to achieve may become a little bit more clear...

SiC
OK, and thanks for the response. Certainly there MUST be an isolation capacitor, and it makes sense to have the voltage divider on the high voltage side of the capacitor. It will also make selecting the capacitor much easier and much less expensive. It also changes the circuit from an RC high pass filter to a capacitor coupled to the opamp input, a much higher impedance and so less likely to cause any distortion.
My suggestion to see if there is any distortion is to also run the same simulation using a square wave. That is easy and simple and will let you have an idea as to what to expect.
One more benefit of having the capacitor on the low voltage side of the voltage divider is thatthe problem of capacitor leakage causing errors is greatly reduced.
 
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Thread Starter

SiCEngineer

Joined May 22, 2019
390
OK, and thanks for the response. Certainly there MUST be an isolation capacitor, and it makes sense to have the voltage divider on the high voltage side of the capacitor. It will also make selecting the capacitor much easier and much less expensive. It also changes the circuit from an RC high pass filter to a capacitor coupled to the opamp input, a much higher impedance and so less likely to cause any distortion.
My suggestion to see if there is any distortion is to also run the same simulation using a square wave. That is easy and simple and will let you have an idea as to what to expect.
One more benefit of having the capacitor on the low voltage side of the voltage divider is thatthe problem of capacitor leakage causing errors is greatly reduced.
I understand what you are saying - but the problem with having the capacitor on the low voltage side, especially for a high voltage supply of -6kV like mine, the desired ripple of 0.1V is also divided down by the resistive divider circuit, which has a voltage ratio of 2000 in my case. A 3V reference voltage for a -6kV output. So that 0.1V is basically within the range of noise when divided down by that much. So the only way to extract the actual voltage ripple from the circuit is to have the isolation capacitor on the high voltage side - but for some reason, in my simulation, you may see that it does let some DC through the isolation capacitor, which doesn't make sense because of how capacitors are supposed to work!
 

Thread Starter

SiCEngineer

Joined May 22, 2019
390
hi SiC,
You need to set the working voltage for this digital gate
E
View attachment 257203
Thanks for this tip - I used to always just use a switch with it's gain set at 5 to get a 5V output with logic gates... learn something new every day!

I have attached a new schematic here. I have changed so that an op-amp now applies the DC offset before the ADC. The error remains that all of the op-amps are amplifying significantly the DC voltage, and not just the AC voltage. Looking around the internet and some have this issue and say it is due to the settling time of the high-pass filter. I could place a Zener diode, but it has been effecting my results, and it wouldn't be entirely feasible for use if I was using this circuit at 6kV and not just 20V...

Any suggestions to improve the circuit or why this is happening, at all? My best guess would be that the ideal capacitors in LTSpice don't act like "real" capacitors and therefore allow some DC to pass - I will see if adding some parasitics changes things at all...
 

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Thread Starter

SiCEngineer

Joined May 22, 2019
390
hi Sic,
Modified the 86nF, to check the OPA,
The first OPA does not appear to be working,.??

E
View attachment 257211
Not sure that I have attached the correct schematics. Can you try this one? I used a amplifier with a higher GBW which seems to distort the square wave a lot less than the one in the schematic you have on hand. I think I am getting there. The signal is amplified much better now but I am still seeing that DC is amplified by the op-amp despite being in a non-inverting high pass filter configuration. Hopefully this makes the task more clear. The op-amp I am using now is AD8038.

Another issue is that the summing amplifier is inverting my signal, maybe I will need to change the first OPA to an inverting configuration, but need to deal with the DC amplification issue first.
 

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Thread Starter

SiCEngineer

Joined May 22, 2019
390
hi SiC,
Circuit section, no Gain from the OPA.?
E
View attachment 257216
Hi Eric, sorry for the confusion, still think that the .asc file you have is an old version. Can you please try this one. The OPA definitely has gain in this simulation as it is amplifying the AC component quite well, but it also amplifies the DC until the RC filter settles. There are still some issues in that the summing amplifier inverts the signal meaning that the polarity of the output signal to the comparators/window detector is wrong.
 

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bertus

Joined Apr 5, 2008
21,850
Hello,

I think that the disable pin is connected wrong.
To have the device enabled, it should be open or connected to V+.

Bertus
 

Thread Starter

SiCEngineer

Joined May 22, 2019
390
Hello,

I think that the disable pin is connected wrong.
To have the device enabled, it should be open or connected to V+.

Bertus
Hi Bertus,

Thanks for the reply. The operational amplifiers I have in the new schematic, AD8038, doesn't have the enable pins anymore. But you are right. I'm not sure if my new schematic is sending properly.
 
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