Hi, I did my first PCBA with Ethernet interface using TLK106 RMII, I followed all suggestion for schematic and layout except the serial termination resistors( I used 10 ohm instead of 33 ohm as suggested by the TI) between the PHY and MAC
, it can start well by initializing the PHY, I can write the PHY registers, but the loopback and ping tests didn't work, For ping test, I can see some ARB received in my laptop each time I ping, but I couldn't get the ICMP after it. For loopback, I (think) the MAC couldn't send out the frame rightly, so failed loopback also, The MAC original EVB is using KSZ8081MNXRNB PHY, so that makes a conflict that can make the MAC unable to send the frame out, or may be a clocking problem! (already changed to the correct PHY address and register values).

 

Welcome to AAC.

Why didn’t you use the specified resistors?

 

I haven't used TLK106 , but I used DP83848 which is nearly identical to TLK110 and TLK111. I assume they have similarities with TLK106.
I don't think using 10R resistors is the cause of your problem. But it should be easy to change to 33R. I also suggest you to check PHY clock in your circuit and details in the datasheet . When operating in RMII , PHY (in case of DP83848) requires 50Mhz external clock instead of 25Mhz crystal.

 

Welcome to AAC.

Why didn’t you use the specified resistors?

thanks for your reply, I used 10 ohm as standard in all design.

 

I haven't used TLK106 , but I used DP83848 which is nearly identical to TLK110 and TLK111. I assume they have similarities with TLK106.
I don't think using 10R resistors is the cause of your problem. But it should be easy to change to 33R. I also suggest you to check PHY clock in your circuit and details in the datasheet . When operating in RMII , PHY (in case of DP83848) requires 50Mhz external clock instead of 25Mhz crystal.

Thanks for the reply, yes the clock is right, it is 50 MHz, generated in MAC and shared with PHY.

 

What is the MAC, you are using ? Is it a bridge, switch, MCU or FPGA based custom implementation ? Can you send a picture of appropriate part of the circuit schematic and PCB ?. What are the RMII trace lengths ?
You may also check if there is a timing problem in tx lines of between your MAC and PHY. It should be possible to change the delay between tx_clk and data lines in either PHY or MAC. In some PHYs, it is done by modifying approriate registers via MDIO interface.