Eliminating Steady State Error

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hello again,

I took another look at this and it looks like what you are talking about might better be described as an offset. To eliminate offset you have to use either an adder or subtractor.
If you have say 0.3v offset then you subtract 0.3v offset.
If the offset is related to the input then you have to use a special circuit to calculate the offset and apply that to some place in the circuit.
But what methods have you been taught so far? That would help determine what way they want you to do it.
I add another integrator circuit which makes the circuit a 2nd order circuit with a gain of 2 before the Vin enters the summing amplifier. Through simulation the error is reduced to 160mV but practically dosent work
 

MrAl

Joined Jun 17, 2014
6,805
I add another integrator circuit which makes the circuit a 2nd order circuit with a gain of 2 before the Vin enters the summing amplifier. Through simulation the error is reduced to 160mV but practically dosent work
Hi,

Ok maybe show a plot and where you see this 160mv.
But yeah an integrator may not work for this problem you may need a subtractor and what you subtract may be a constant or it may have to come from a special kind of measurement of the output. Depending on what kind of output you are after you may also need an additional amplifier.

You should realize that this problem can be solved after creating a block diagram too which removes the implementation details and allows for a more transparent analysis of the system itself.

When you say 160mv do you mean that the bottom peaks do not touch zero volts on the output like the input does?
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hi,

Ok maybe show a plot and where you see this 160mv.
But yeah an integrator may not work for this problem you may need a subtractor and what you subtract may be a constant or it may have to come from a special kind of measurement of the output.

When you say 160mv do you mean that the bottom peaks do not touch zero volts on the output like the input does?
I will send it when i turn on my computer. No its same as the graph on #1 but with the two lines more close to each other. Then task we need to do is to bring the two lines intercepting each other or as near as possible
 

MrAl

Joined Jun 17, 2014
6,805
I will send it when i turn on my computer. No its same as the graph on #1 but with the two lines more close to each other. Then task we need to do is to bring the two lines intercepting each other or as near as possible
Hello again,

Rather than wait for your response i went ahead and solved this to save time.
However, i wont say too much more about the solution until you try it again after a hint.
The hint is that this can be solved with just a change in some gain or gains.

The solution i found looks good enough, assuming you are talking about the usual steady state error.
Take a look at the attachment for a simulation of one solution. I did not attempt to optimize this nor did i attempt to see if there was such an optimization possible for this problem.
 

Attachments

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hello again,

Rather than wait for your response i went ahead and solved this to save time.
However, i wont say too much more about the solution until you try it again after a hint.
The hint is that this can be solved with just a change in some gain or gains.

The solution i found looks good enough, assuming you are talking about the usual steady state error.
Take a look at the attachment for a simulation of one solution. I did not attempt to optimize this nor did i attempt to see if there was such an optimization possible for this problem.
Thats the expected graph im looking for. So you mean from the original circuit, just change the gain at any opamp will do? or only one of the integrator? What about the calculation?
 

MrAl

Joined Jun 17, 2014
6,805
Thats the expected graph im looking for. So you mean from the original circuit, just change the gain at any opamp will do? or only one of the integrator? What about the calculation?
Hi,

No sorry not just any op amp gain, and another hint is that you actually have to add a gain stage(s) in there somewhere.
Not sure what you mean about the calculation, but when you are done with the circuit arrangement you can calculate the output as usual.
But talking about the calculation, look at your transfer function and see if you can figure out what has to change in the transfer function to get less steady state error. Then maybe you can figure out what gain(s) need to be added or changed (ok yes one or two gain stages have to be added unless you can figure out a better way like increase the last integrator gain and then go from there).

Just wondering how did you come about getting this assignment? Did they show you anything about how to do systems like this or did they provide a book or something?
I would think a book on control theory would have the technique in it.

If you cant figure it out after a little while then i'll give you my solution but you should look into why it works and if you can even make it better, which you might be able to do.
The tradeoff is better steady state error vs a little more overshoot/ringing.

There are even better techniques out there but i'd have to look up some stuff in my old books.
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hi,

No sorry not just any op amp gain, and another hint is that you actually have to add a gain stage(s) in there somewhere.
Not sure what you mean about the calculation, but when you are done with the circuit arrangement you can calculate the output as usual.
But talking about the calculation, look at your transfer function and see if you can figure out what has to change in the transfer function to get less steady state error. Then maybe you can figure out what gain(s) need to be added or changed (ok yes one or two gain stages have to be added unless you can figure out a better way like increase the last integrator gain and then go from there).

Just wondering how did you come about getting this assignment? Did they show you anything about how to do systems like this or did they provide a book or something?
I would think a book on control theory would have the technique in it.

If you cant figure it out after a little while then i'll give you my solution but you should look into why it works and if you can even make it better, which you might be able to do.
The tradeoff is better steady state error vs a little more overshoot/ringing.

There are even better techniques out there but i'd have to look up some stuff in my old books.
Sure. Will go and look on the gains now after busy with some small test. The assignment had due but i want to know the solution. There are no books provided. Just this question given from lectures. Please do show me the solution as I can more understand and figure out the way of solving this with a proper solution. Thanks! Very good help, mate.
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
t
Hi,

No sorry not just any op amp gain, and another hint is that you actually have to add a gain stage(s) in there somewhere.
Not sure what you mean about the calculation, but when you are done with the circuit arrangement you can calculate the output as usual.
But talking about the calculation, look at your transfer function and see if you can figure out what has to change in the transfer function to get less steady state error. Then maybe you can figure out what gain(s) need to be added or changed (ok yes one or two gain stages have to be added unless you can figure out a better way like increase the last integrator gain and then go from there).

Just wondering how did you come about getting this assignment? Did they show you anything about how to do systems like this or did they provide a book or something?
I would think a book on control theory would have the technique in it.

If you cant figure it out after a little while then i'll give you my solution but you should look into why it works and if you can even make it better, which you might be able to do.
The tradeoff is better steady state error vs a little more overshoot/ringing.

There are even better techniques out there but i'd have to look up some stuff in my old books.
The only thing i know to reduce steady state error for ramp input is change it to second order system. Lecturer does not teach much about it. I found some article on increasing the gain but i dont know the value of gain is need to be calculated or just estimate it.
 

MrAl

Joined Jun 17, 2014
6,805
t
The only thing i know to reduce steady state error for ramp input is change it to second order system. Lecturer does not teach much about it. I found some article on increasing the gain but i dont know the value of gain is need to be calculated or just estimate it.
Hi,

Ok then try this first...

First add a gain (maybe a gain of 2) to the feedback itself (that is the gain from Vout to the place where Vout goes into the first op amp stage).
Then, add another gain with same value on the VERY output, and the output of that becomes the new output Vout2. Vout2 is then the actual output of the network.

This is interesting because the one gain causes an overall gain division by a factor A and that reduces the steady state error by A^2, but the second gain brings the overall gain back to normal. So the two gains cause a division of the steady state error by A^2.
I used a gain of 10 for that last plot, but it is informative to start with 2 and work your way up because that would make the change to the transfer function more apparent. You could go higher but you have to watch the peak amplitudes and adjust when you get to the implementation phase.

Now that's not really the end of it yet. Try to work those gains into your current circuit. Remember changing resistor values alone can change gains, and there may be a way to NOT have to ADD anything to the circuit, just change some resistor values (or a cap value).
Try to do this as this will simplify your circuit too.

There is one more step. This is the theory to the practical step. If you did any of these systems before you might know that signal amplitudes in theory can be very very high yet in an actual circuit they must always be within the power supply rails.
The theoretical solution above must be transformed into a practical implementation next. This is also a very good exercise and i think you will find this very interesting.
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hi,

Ok then try this first...

First add a gain (maybe a gain of 2) to the feedback itself (that is the gain from Vout to the place where Vout goes into the first op amp stage).
Then, add another gain with same value on the VERY output, and the output of that becomes the new output Vout2. Vout2 is then the actual output of the network.

This is interesting because the one gain causes an overall gain division by a factor A and that reduces the steady state error by A^2, but the second gain brings the overall gain back to normal. So the two gains cause a division of the steady state error by A^2.
I used a gain of 10 for that last plot, but it is informative to start with 2 and work your way up because that would make the change to the transfer function more apparent. You could go higher but you have to watch the peak amplitudes and adjust when you get to the implementation phase.

Now that's not really the end of it yet. Try to work those gains into your current circuit. Remember changing resistor values alone can change gains, and there may be a way to NOT have to ADD anything to the circuit, just change some resistor values (or a cap value).
Try to do this as this will simplify your circuit too.

There is one more step. This is the theory to the practical step. If you did any of these systems before you might know that signal amplitudes in theory can be very very high yet in an actual circuit they must always be within the power supply rails.
The theoretical solution above must be transformed into a practical implementation next. This is also a very good exercise and i think you will find this very interesting.
If the output is end of the other opamp which is Vout2, is the output still monitered? As the requirement are the output needs to be monitered
 

MrAl

Joined Jun 17, 2014
6,805
If the output is end of the other opamp which is Vout2, is the output still monitered? As the requirement are the output needs to be monitered
Hi,

Yeah sure. You mean with a scope or volt meter? Yes.

Basically you add a gain in the feedback path which lowers the overall gain of the circuit, so you need to add a gain to the output to get the output back up to normal. Interestingly when we do this the steady state error does not increase with the overall gain it actually decreases.

There are other ways to do it though i was hoping you would want to accept that challenge. That way you might not need more gain stages at all. In the end however many of the gains may need to change in order to get a workable practical circuit where the peak signal amplitudes are all within the power supply rails.

Does this make sense now or no?
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hi,

Yeah sure. You mean with a scope or volt meter? Yes.

Basically you add a gain in the feedback path which lowers the overall gain of the circuit, so you need to add a gain to the output to get the output back up to normal. Interestingly when we do this the steady state error does not increase with the overall gain it actually decreases.

There are other ways to do it though i was hoping you would want to accept that challenge. That way you might not need more gain stages at all. In the end however many of the gains may need to change in order to get a workable practical circuit where the peak signal amplitudes are all within the power supply rails.

Does this make sense now or no?
For this i cant really understand as the requirements are the very last output we measured need to be feedbacked to the circuit. So for the gain is we need to add a non inverting amplifier or just change the value of resistor from the summing amplfiier or the feedback inverting amplifier? Can I take a look on the circuit? Im having a test on this subject tomorrow and need to be prepared in a hurry.
 

Attachments

MrAl

Joined Jun 17, 2014
6,805
Hello again,

Here is the version with the two added gain stages. Note they are non inverting and to see any reduction in steady state error they must be greater than 1.

You will note that if you are allowed to change the circuit resistors then you can get the gain at the top of the drawing by changing a resistor of that first stage on the left instead of having to add a stage.
This is the theoretical solution but for the implementation the circuit has to be changed to prevent the signal peaks from going too high or too low.

Take a look see what you think. Do a simulation once you have tried making the gain A higher than unity. Do a calculation after that too, show your results here. BTW this already is a second order system.

What else we should talk about later is pole zero cancelation.
 

Attachments

MrAl

Joined Jun 17, 2014
6,805
Hello again,

Here is the version with the two added gain stages. Note they are non inverting and to see any reduction in steady state error they must be greater than 1.

You will note that if you are allowed to change the circuit resistors then you can get the gain at the top of the drawing by changing a resistor of that first stage on the left instead of having to add a stage.
This is the theoretical solution but for the implementation the circuit has to be changed to prevent the signal peaks from going too high or too low.

Take a look see what you think. Do a simulation once you have tried making the gain A higher than unity. Do a calculation after that too, show your results here. BTW this already is a second order system.

What else we should talk about later is pole zero cancelation.
Hello again,

Hey are you allowed to make changes to the original system itself?
If so, i think increasing the gain of the last integrator(s) stage works too.
If not, then you'll have to go with the two gains.
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hello again,

Hey are you allowed to make changes to the original system itself?
If so, i think increasing the gain of the last integrator(s) stage works too.
If not, then you'll have to go with the two gains.
06036F79-D1D7-48F4-9D62-D94548AC932F.jpegYou mean the circled integrator and change the resistor gain so i can save more opamp? but if i do this, what about the output? should i still have a non inverting amplifier there?
 

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hello again,

Here is the version with the two added gain stages. Note they are non inverting and to see any reduction in steady state error they must be greater than 1.

You will note that if you are allowed to change the circuit resistors then you can get the gain at the top of the drawing by changing a resistor of that first stage on the left instead of having to add a stage.
This is the theoretical solution but for the implementation the circuit has to be changed to prevent the signal peaks from going too high or too low.

Take a look see what you think. Do a simulation once you have tried making the gain A higher than unity. Do a calculation after that too, show your results here. BTW this already is a second order system.

What else we should talk about later is pole zero cancelation.
Is it both of the gain should be the same? As by adding those two gain to my transfer function, by using the formula Ess=sEs[1-T], the answer should be 0 or very close to 0. Then this is the theoretical value and then implement it in practical circuit. Is it right.
 

MrAl

Joined Jun 17, 2014
6,805
View attachment 193217You mean the circled integrator and change the resistor gain so i can save more opamp? but if i do this, what about the output? should i still have a non inverting amplifier there?

Hi,

In that circuit first get rid of that input stage added to Vin.
Then change C6 and C7.

I looked at the theory with the two extra gain stages and the steady state error goes down lower as the gains go up.

But in your circuit there i think you can change C6 and C7 by a factor of 1/10 and get better results, but you can try lower too. So instead of 2.2uf use 0.22uf and see if you like the results both in theory and in the simulation. If not you may have to go lower.
Going down in C by a factor of 1/10 means the steady state error goes down by a factor of 1/10^2 which is 1/100. So if you stated with a SS error of 0.366 it will go down to 0.00366.

The key point is increasing the gain lowers the steady state error.

[LATER]
The cap change idea may only work for the previous circuit not this latest one. Try the two gains first so you can at least see it work like that.
 
Last edited:

Thread Starter

richard_lai

Joined Nov 21, 2019
24
Hi,

In that circuit first get rid of that input stage added to Vin.
Then change C6 and C7.

I looked at the theory with the two extra gain stages and the steady state error goes down lower as the gains go up.

But in your circuit there i think you can change C6 and C7 by a factor of 1/10 and get better results, but you can try lower too. So instead of 2.2uf use 0.22uf and see if you like the results both in theory and in the simulation. If not you may have to go lower.
Going down in C by a factor of 1/10 means the steady state error goes down by a factor of 1/10^2 which is 1/100. So if you stated with a SS error of 0.366 it will go down to 0.00366.

The key point is increasing the gain lowers the steady state error.
So no need to add amplifier? Just change the two resistor value by 1/10 of original value? Any article about this change available? As i might need it in the report
 
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