# Dynamic Power Dissipation

Joined Jun 7, 2021
4
Hi!

I am trying to compute the dynamic (switching) power dissipation of a few digital sytems including full adders and multipliers.
Is the following expression correct to calculate the average power dissipation?:

P.D.(average)= 1/T*integral{(input supply voltage)*(output current)}

I have also included the formula in a word file below.

Can someone please verify if the expression is correct.
Thanks and regards

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#### Deleted member 115935

Joined Dec 31, 1969
0
This sounds like the sort of student / home work question that often gets set.

yes, the equation is correct, as far as it goes,

Power can be expressed as volt drop times the current passing through.

Joined Jun 7, 2021
4

But would I be correct when I take the product of the input supply voltage (which would be a DC voltage) and the output current?
I need the switching power dissipation.

Regards

#### Deleted member 115935

Joined Dec 31, 1969
0

But would I be correct when I take the product of the input supply voltage (which would be a DC voltage) and the output current?
I need the switching power dissipation.

Regards
is this home work ?

Joined Jun 7, 2021
4
Just a project I am undertaking

#### Lo_volt

Joined Apr 3, 2014
321
Interesting question, but I don't think you're going to find an easy answer. I'll say up front that I don't have a good one for you. The question reminds me of my early days in electronics design. I had put together my circuit, drawn up the schematic and was ready to order parts when I started to look at how to power the board. How much power would I need? I don't remember (it's only been 35 years) what answer I got to that question. These days, I rely a lot on intuition and a little deductive reasoning.

Here are a few rules of thumb:
-Logic circuits are generally low power until you add in a processor or an FPGA or CPLD.
-Higher clock rates mean higher power consumption.
-Driving anything, an LED, motor, solenoid, speaker or the like will use more power.
-Digital outputs will draw current that depends on the number of inputs they drive (fanout). Most outputs have a current drive limit specified in the part data sheet.
-Anything that requires a heat sink will also draw a lot of power.
-Sequential or clocked circuits draw the most power during state changes.

If you really want an answer, you may have to find it empirically. You may need to prototype the circuit and measure power using that prototype.

Joined Jun 7, 2021
4
Interesting question, but I don't think you're going to find an easy answer. I'll say up front that I don't have a good one for you. The question reminds me of my early days in electronics design. I had put together my circuit, drawn up the schematic and was ready to order parts when I started to look at how to power the board. How much power would I need? I don't remember (it's only been 35 years) what answer I got to that question. These days, I rely a lot on intuition and a little deductive reasoning.

Here are a few rules of thumb:
-Logic circuits are generally low power until you add in a processor or an FPGA or CPLD.
-Higher clock rates mean higher power consumption.
-Driving anything, an LED, motor, solenoid, speaker or the like will use more power.
-Digital outputs will draw current that depends on the number of inputs they drive (fanout). Most outputs have a current drive limit specified in the part data sheet.
-Anything that requires a heat sink will also draw a lot of power.
-Sequential or clocked circuits draw the most power during state changes.

If you really want an answer, you may have to find it empirically. You may need to prototype the circuit and measure power using that prototype.
Thank you very much for the detailed response!