Professor Sam's data seems to disagree with that observation, if I understand correctly.

Not only Prof. Sam Ben-Yaakov,
but TDK, manufacturer of ceramic capacitors,
talked the same:
https://www.tdk.com/en/tech-mag/electronics_primer/6


"●DC bias characteristics (DC voltage characteristics)
The capacitance of a ceramic capacitor also changes according to the applied voltage. With a DC voltage, this property is referred as the DC bias characteristics. With low dielectric constant capacitors (type 1), capacitance hardly changes, but in high dielectric constant capacitors (type 2) with "B" characteristics and especially ceramic capacitors with “F” characteristics, the change is significant. This is due to the fact that high dielectric constant capacitors use a ferroelectric substance (such as BaTiO3) which generates spontaneous polarization.
Ceramics material is a polycrystalline substance that consists of a large number of crystal grains. In ferroelectric material, the so-called domains of these grains are arranged alternately in the opposite direction, thereby canceling each other out, so that no spontaneous polarization occurs. As the strength of the applied direct electric field increases, the dielectric constant initially also rises because the orientation of spontaneous polarization is aligned with the orientation of the electric field. However, when the electric field is made stronger, alignment ceases and saturation is reached, causing the dielectric constant to drop. When applying DC bias, it is therefore necessary to select the correct parameters taking the characteristics of the dielectric as well as the usage voltage and withstand voltage into consideration. Also, the capacitance drop caused by DC bias will tend to be more pronounced in smaller capacitors."

 

@johnyradio
you say
"Repetition without explanation is repetition without explanation is repetition without explanation"

I agree you are repeating, and you are remarkably also becoming more vauge as things progress.

its almost as if you dont know what you want,

in engineering ,
one has to learn and research with reference to the application.

there are ss yoh have seen on the manufactures web sites , front line data sheets, specifications and more detailed "white papers"

you seem focused upon the esr changing with voltage .
you will also notice that the capacitance varies with voltage

you will also see, that different capacitors are used in different applications,

you as for brass tack info,

you are focused on change in esr,
my suggestion to help you understand
in your application, chose a capacitor , voltage and load.
draw out / calculate the load voltage and current assuming a perfect capacitor
now draw out the same with the esr from the data sheet
now draw out the same the predicred changed in esr with voltage .

in general in engineering , we are conservative , if an item is needed to work at 5 volts , all else being equal, wed not use a 5v2 part but the 10v part,

being able to make these sort of decisions, and knowing whats significant , is the difference between engineering and theory.

 

@johnyradio
Your initial question was, "Does a Series Cap Prefer Unipolar or Bipolar Square Waves?"

Can you understand why your question is backwards?
You don't select a capacitor and then present it with an option of two types of waves.

You specify the waveform first and then select the capacitor for guaranteed operation under the given conditions.

 

Why not provide us with details of the exact application that concerns you with the suitability of the capacitor chosen?

This is a general question about the performance and behavior of ceramic capacitors.
I haven't chosen a cap yet, But I have chosen ceramic capacitors. Based on Sam's research, I've narrowed it down to type one ceramics.

Don't use a polarized capacitor where a non-polar capacitor is required.
The polarized capacitor will explode very dramatically.

Excellent info but not related to ceramics.

The capacitance of a ceramic capacitor also changes according to the applied voltage. With a DC voltage, this property is referred as the DC bias characteristics. With low dielectric constant capacitors (type 1), capacitance hardly changes, but in high dielectric constant capacitors (type 2)...

Top notch, 100%, fantastic answer! Informative and comprehensive. Thank you!

you seem focused upon the esr changing with voltage .
you will also notice that the capacitance varies with voltage

I guess you didn't notice my post about Sam's research, in which I do mention the effect of DC bias on capacitance.

You don't select a capacitor and then present it with an option of two types of waves.
You specify the waveform first and then select the capacitor for guaranteed operation under the given conditions.

That's not necessarily true at all. I'm designing a whole system, including the supply and the load. The size and cost requirements of the load take priority over the supply. With that in mind, my target capacitor type is ceramic type 1, because my understanding is that it has the best resilience and lifetime to oscillating signals. Now I'm designing the supply and I have the freedom to choose bipolar or unipolar design. I want to pick the design that is most comfortable for type 1 ceramics. Comfortable meaning least harmful, most efficient, and most predictable. Moreover, for a unipolar supply I can get away with a half H bridge, but a bipolar supply will require a full H bridge. So if the load cap is fine with a half H, that reduces cost and complexity of my supply. In my application, the series cap at the load dictates the supply waveform, and not the other way around.

 

In case anyone is wondering, the answer from Danko, plus Sam's research that I posted , satisfy my original question.

Summary
With ceramic capacitors, a DC bias can:

• increase ESR
• decrease capacitance
• increase acoustic vibration or risk of cracking

This effect is more pronounced with high dielectric constant Type II/Type III (ferroelectric, eg. X7R/Y5V) capacitors than Type I (paraelectric, eg. C0G/NP0). This is due to the fact that Type II/III caps use a ferroelectric substance (such as BaTiO3) which generates spontaneous polarization. The capacitance drop caused by DC bias will tend to be more pronounced in smaller capacitors.

Details are available here:

• https://www.tdk.com/en/tech-mag/electronics_primer/6

But I am happy to continue discussing!

 

In case anyone is wondering, the answer from Danko, plus Sam's research that I posted , satisfy my original question.

Summary
With ceramic capacitors, a DC bias can:

• increase ESR
• decrease capacitance
• increase acoustic vibration or risk of cracking

This effect is more pronounced with high dielectric constant Type II/Type III (ferroelectric, eg. X7R/Y5V) capacitors than Type I (paraelectric, eg. C0G/NP0). This is due to the fact that Type II/III caps use a ferroelectric substance (such as BaTiO3) which generates spontaneous polarization. The capacitance drop caused by DC bias will tend to be more pronounced in smaller capacitors.

Details are available here:

• https://www.tdk.com/en/tech-mag/electronics_primer/6

But I am happy to continue discussing!

thank you for summarising your research on ceramic capacitors

all very valid and as you have seen , well documented qualities of ceramics.

engineering wise
in the majority of places ceramics are used ,
the loss of capacitance with voltage is well understood, and not a worry , as mentioned above we just up scal the capacitors voltage and take into account the change.

cog / nop tend to be used in audio and radio , primarily because of their better handling of high frequencies, stability and less microphone.

Just taking ceramics,
if you look at a company like digi key and look at say 100 uf capacitors 10v, , you will see many types.
X8, X7, X5, Y5 , Z5 et all.

you will see that there are many, all with different properties that the engineer will select to fit their circuit requirements.

your general question might have been well intended, but it was only recently that you have opened up in that you wanted to look at ceramics for power supply decoupling.,

this implies capacitors in parallel across the power , where as your initial diagrams show the capacitor in series, with power passing through it

these are two very different situations , and its unlikely thev
same capacitor would be used in series signal/ power case as used in power supply decoupling.

even with power supply decoupling,
we engineeres would tend to use different types of power capacitors at different places on the board.

I wish you the best

 

it was only recently that you have opened up in that you wanted to look at ceramics for power supply decoupling.,

this implies capacitors in parallel across the power , where as your initial diagrams show the capacitor in series, with power passing through it

the loss of capacitance with voltage is well understood, and not a worry , as mentioned above we just up scal the capacitors voltage and take into account the change.

i mentioned ceramic in post #6 on pg 1, but that's easy to miss. My bad for not putting it in the original question. I mistakenly assumed it was obvious i wasn't attempting to put a bipolar signal through a polarized cap.

My usage is series AC coupling as shown in the original question, not parallel, approx 5V, 5A, @ 1 Mhz.

"upscale the voltage" - Are you saying you can reduce the effect of capacitance-reduction by using a cap with a higher voltage rating? I assume that won't help with increased ESR.

Incidentally, the terms bipolar/unipolar, as in my original question, might avoid the ambiguities of AC/DC, which became a contentious subtopic during this thread.

Many thanks!

 

i mentioned ceramic in post #6 on pg 1, but that's easy to miss. My bad for not putting it in the original question. I mistakenly assumed it was obvious i wasn't attempting to put a bipolar signal through a polarized cap.

My usage is series as shown in the original question, not parallel, approx 5V, 5A, @ 1 Mhz.

Incidentally, the terms bipolar/unipolar might avoid the ambiguities of AC/DC, which became a contentious subtopic during this thread.

Many thanks!

agree on unipolar and bipolar,
and also your original qustion was at best open to interpretation.

can i check then, you want to pump 5 Amp through a capacitor at 1Mhz , as per your original picture and its not for decoupling ?

what value capacitance are you looking at ?
for instance , a 1uf capacitor at 1 Mhz has a reactants of around 200 mOhm
to get 5 Amps through that , it would drop 1 volt , so your 5v would be 4v .

 

can i check then, you want to pump 5 Amp through a capacitor at 1Mhz , as per your original picture and its not for decoupling ?

Yes

what value capacitance are you looking at ?

1.4 uF. I calculated (maybe incorrectly) 1.6 uF for 1 Mhz, so i can adjust freq slightly as needed.
https://search.kemet.com/component-documentation/download/specsheet/C1812C145J5JLC7805

for instance , a 1uf capacitor at 1 Mhz has a reactants of around 200 mOhm
to get 5 Amps through that , it would drop 1 volt , so your 5v would be 4v .

i assume i can bump up Vin to compensate. Worried about heat with that much drop, but i read that reactance doesn't cause heat.

 

Yes


1.4 uF. I calculated (maybe incorrectly) 1.6 uF for 1 Mhz, so i can reduce freq slightly as needed.
https://search.kemet.com/component-documentation/download/specsheet/C1812C145J5JLC7805


i assume i can bump up Vin to compensate. Worried about heat with that much drop, but i read that reactance doesn't cause heat.

just to check,
your technically making a high pass filter , so if you apply ax1 Mhz square wave, you have frequencies up to 10s of Mhz to account for .

yes pure reactance has no power dissipation,
but
there is no such thing as pure reactance in a real capacitance ,
the model of the real capacitor has resistance and inductance
that does cause dissipation,

some links
https://www.analog.com/en/resources/analog-dialogue/articles/capacitance-and-capacitors.html

https://wiki.analog.com/university/courses/electronics/electronics-lab-capacitors

 

your technically making a high pass filter , so if you apply ax1 Mhz square wave, you have frequencies up to 10s of Mhz to account for .

If you mean harmonics, that's fine. The purpose of the cap is to block DC.

If the cap ESL softens the corners of the square slightly, that would be a convenient benefit, to reduce EMI noise.

 

If you mean harmonics, that's fine. The purpose of the cap is to block DC.

If the cap ESL softens the corners of the square slightly, that would be a convenient benefit, to reduce EMI noise.

fyi.
a high pass will not attenuate harminics as much as the baseband 1Mhz, qed, your likely to achieve more noise

 

In capacitor research a simulator could reflect how a capacitor fairs under various conditions.
Probably the education involved would extend beyond their latest generation of simulation software.
I imagine a major capacitor RR lab would need specialist in physics, material science and electrochemistry
and electrical engineers, ect. Within that framework and with direction a meaningful discussion could go smoothly.