I designed a board and breadboarded using CMOS DIP (ripple counter). Everything worked great. So my PCBs arrive and I put them together to discover the SOP package does not behave the same.
Basically the issue is that I'm using a diode as an AND gate on output pin of a ripple counter. It works great in DIP package but with SOP it seems like it can't take the full current to give it a good low on 01 or 10 output... Obviously without the diode gate everything works great (without the decoding I want). I'm going to put the SOIC on a DIP adapter board and test some more.
I think the solution may be a MOSFET gate so it grounds the output of first output to ground when the second input is low (P Channel)... Ideas comments?
I wish I could draw a picture but logic outputs get messy for me to draw.
Basically the issue is that I'm using a diode as an AND gate on output pin of a ripple counter. It works great in DIP package but with SOP it seems like it can't take the full current to give it a good low on 01 or 10 output... Obviously without the diode gate everything works great (without the decoding I want). I'm going to put the SOIC on a DIP adapter board and test some more.
I think the solution may be a MOSFET gate so it grounds the output of first output to ground when the second input is low (P Channel)... Ideas comments?
I wish I could draw a picture but logic outputs get messy for me to draw.