This is a Digital Design for my class.
I am trying to make a digital fan controller using discrete logic, starting with a JK FF to supply 2-bit states that start with the fan off (00) and steps to high (11) and then starts back at (00). The two bit logic is then gated to their select optocouplers that ground 1 of 3 voltages from the fan, from a separate power supply (12v).

I found what I thought was a really simple debounce circuit using 2 NOR gates, but I think it will only supply a spike that doesn't have much in the way of hold time. The problem I am having is the 7-seg display from the timer will not step through the states reliably. When I turn it on, sometimes it will cycle through once or twice, but after that it will skip state (01), usually going (0,2,3,0,2,3,0...) and doesn't even do it in that order sometimes. The included schematic shows the connections.

The spike on the CLK input to the JK FF should be enough for a negative going transition to increment the counter, and it does count reliably when I check just the button and the counter on an o-scope, but when I connect the rest of the circuit (display/driver and other logic gates) unreliability occurs as evidenced in the display.

Some one told me there is something called a Miller Effect, but looking that up got me no clue.
Would a small capacitor between the Vcc and GND on the gates help?
Is there some modification I need to do to the pushbutton to produce a square wave rather than a spike (output goes from 0 to 4.5v). I noticed holding the pushbutton down rather than a quick press gives a bigger spike, but not much of a longer duration.

 

Welcome to AAC!

Relevant portion of the schematic:

The one shot triggers on the rising edge. Try putting a pull-up resistor on U1A pin 2.

R1/C1 values probably also need to be tweaked; 47uF seems excessive.

 

I'll check that out with 75ohm or 25ohm. Thanks.

 

It really isn't a good debouncer at all. It is a "one shot", but not a good one and it is more or less the wrong way up. You might make it work marginally by reducing R1 to about half of what it is and connecting it to ground instead of +5.
With the resistor in that position, the clock output is high. When the switch is closed a pulse through C1 takes the inputs of U1B high. The cap rapidly charges and ends the pulse. It can generate multiple pulses because the input of U1B spends most of its time during the pulse at a voltage level that is neither clean logic 1 nor 0.

Do you have any 74xx14 or 74xx132 on hand? Or a pushbutton with both normally open and normally closed contacts? 555 timer?

Suggestion for schematics with gates: When you are using a NOR gate and are "using" the HIGH condition at the output, draw the gate as a negative-input AND gate (i.e. apply DeMorgan's theorem). It makes the logic easier to follow. Same if you are using NAND gates as negative-OR gates or inverters if it is the HIGH at the output that "does the work." Also group your gates so the associations are more apparent when you can. I'd make U5A and U5D adjacent [EDIT - sorry, I wasn't paying attention, my suggestion here is no improvement: ] and U6A and U6C adjacent. A schematic should first and foremost show you how a circuit works, not how parts are arranged physically.

Other details:

• You have CP for U2A tied high.
• You should have current limiting resistors between the outputs of the gates and the IREDs of the optocouplers.
• TTL can "sink" more current than it can "source", so typically such a circuit would be designed to drive the optocouplers when gate outputs were LOW (i.e. tie anode to V+ and cathode to gate output, with the current limiting resistor in there as convenient).
• Because you have both Q and /Q outputs from each stage of the counter, you don't need any inverters in the gating

count 0 = /MSB * /LSB (using * for AND)
count 1 = /MSB * LSB
count 2 = MSB * /LSB
count 3 = MSB * LSB
If you use NAND gates, one package (74xx00) will do it all and you get your active-low drive for the optocouplers

count 0 = /(/MSB * /LSB)​

 

You must have current limiting resistors for the each segment of the 7-seg display.

 

It really isn't a good debouncer at all.

It will work as a switch debouncer as long as the time period is greater than the duration of the switch bounce.

 

Also, don't forget that each IC should have a decoupling capacitor (0.1uF) from its Vcc pin to ground.

 

Thanks for all the input. The debounce circuit just wouldn't work no matter what I tried, which was disappointing because I thought it would be cool to have passive components take care of the matter. The pulse was too short no matter what and the output never neared predictable states. Tried all kinds of configurations, but the moral of the story was: when I put a square wave generator on the circuit, the rest of it worked fine, up to actually powering the fan, so we used a 555 timer - I know, should'a done that in the first place, but it was in the damn book, so I wanted to see it work.
I found some open-collector (or are they open-drain) NANDs and redesigned that. Thanks to ebp's suggestions regarding complementary outputs, I only need the one 74HC01.
I am including the revised schematic in case anyone is interested. It is still a prototype at this point.
I do have another sticking point however. I need to figure out what is going on with that three position switch but the voltage readings don't make any sense. It has 4 pins/terminals;
Low position there is no voltage between any of the terminals,
Med has the 5v between two terminals (3 points), and
Hi has about 5v at on terminal (2 points).
I will have to do the tests again because we got so agitated the records were confused and didn't help anything afterwards.
Thank you again for helping.

 

jbeng was right about those decoupling caps by the way.

 

Hi

The debounce circuit suggested by Dl324 does generate a square wave output pulse with a duration of approximately 0.7*R*C
But it won't do anything with its output shorted to VCC (or GND?).

Looking at the schematic, it seems you need a low going clock pulse for the active low clock inputs (hard to tell cause it seem there are some unusual connections).

Anyway..something like this should have also worked. The circuit only needs two gates to work but the chip comes with four gate so I used them all.