De-bounce circuit not working as expected

Thread Starter

recklessrog

Joined May 23, 2013
985
hi Roger,
I would also suggest adding a low value in series with the switch contacts, say 47R or 100R.
Link the two inputs of the 4093 together, no floating inputs
You should find some CD4093 amongst those IC's you picked up from me.
E
Hi Eric, yes there are some there. I did link the inputs, (should have shown that in my quick drawing) I will add the resistor as you suggest. :)
 

ebp

Joined Feb 8, 2018
2,332
Bounce time beyond about 20 milliseconds is very unlikely even with cheap tactile switches. About the only way you will get longer than that is if the switch has some sort of wiping contact. I certainly wouldn't go to the expense of 470 nF caps for tac switches (cost differential is very small for SM components, but through-hole in that range are still stupidly expensive. A 1M pullup is quite acceptable with ceramic caps and 4000 series, which will yield a time constant of 100 ms with 100 nF. One time constant will get the cap voltage pretty close to the upper threshold for a 4093.
 

eetech00

Joined Jun 8, 2013
4,705
Bounce time beyond about 20 milliseconds is very unlikely even with cheap tactile switches. About the only way you will get longer than that is if the switch has some sort of wiping contact. I certainly wouldn't go to the expense of 470 nF caps for tac switches (cost differential is very small for SM components, but through-hole in that range are still stupidly expensive. A 1M pullup is quite acceptable with ceramic caps and 4000 series, which will yield a time constant of 100 ms with 100 nF. One time constant will get the cap voltage pretty close to the upper threshold for a 4093.
0.47uf is about 32 cents USD for 1 and 22 cents each USD for 10.
20 ms is good. 100ms bounce or greater is not uncommon for cheap switches.

eT
 
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eetech00

Joined Jun 8, 2013
4,705
I looked through the ic's on hand and found a 4093 Schmitt trigger which I have wired as per the diagram below.
It seems very tolerant of the resistor value, anything from 10k to 330k works fine so I chose 220k
to reduce the current into the tactile switch where all it really has to do is discharge the capacitor.
View attachment 154465
Can anyone see a problem in doing it like this or suggest an improvement?
As it has completely eliminated the problems I was having, I will forget the other de-bounce circuit and stick to this one.

EDIT:- Both gate inputs are linked. No floating inputs.
If you use this topology, be sure to use a power-on reset circuit for the FF because there will be a momentary output pulse from the inverter at power up (just like the button was pressed) and it will trigger the FF.

eT
 

ebp

Joined Feb 8, 2018
2,332
If you use this topology, be sure to use a power-on reset circuit for the FF because there will be a momentary output pulse from the inverter at power up (just like the button was pressed) and it will trigger the FF.

eT
If you need a known state, you must use power on reset in any case since the initial state of the flip flop is indeterminate.

Good power-on reset circuits are surprisingly tricky and often botched (like D-Link did in some Ethernet switches I have - every time I get a brief power drop I have to go cycle the power on them to get them to reset properly; nice switches otherwise).

A crude but sometimes acceptable POR for the flip-flop can be done with an RC network on the preset or clear pin, as required.
 

eetech00

Joined Jun 8, 2013
4,705
If you need a known state, you must use power on reset in any case since the initial state of the flip flop is indeterminate.

Good power-on reset circuits are surprisingly tricky and often botched (like D-Link did in some Ethernet switches I have - every time I get a brief power drop I have to go cycle the power on them to get them to reset properly; nice switches otherwise).

A crude but sometimes acceptable POR for the flip-flop can be done with an RC network on the preset or clear pin, as required.
If fact...one unused gate from the CD4093B chip could be used to implement the POR circuit....

eT
 

crutschow

Joined Mar 14, 2008
38,525
Here's the LTspice simulation of a CD4013 FF using an RC delay on the D feedback to provide de-bounce.
It shows the ignoring of any switch bounces up to about 80ms duration.
This time can be increased, if necessary, by increasing the value of C1.
There is no concern about clock rise-time since there is no added capacitors on the clock input.

upload_2018-6-15_10-57-21.png
 

Thread Starter

recklessrog

Joined May 23, 2013
985
P1010004.JPG

Well, thanks to all the help, I now have all the switching working as it should. Just got to wire up the 4066's and work out the signal routing and it will be done!
Although power on state is not an issue with this design, as there will be two unused schmitt triggers on one of the 4093's, It would be nice to implement it, I will have to read up how.
Is it ok to connect all the clr inputs on the 4027's to a common source?
 
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Thread Starter

recklessrog

Joined May 23, 2013
985
Well here it is, finally !! I'm pleased to say it worked first time after final assembly. The switching arrangements took some working out, but my goal was not to use DPDT switches for selecting the outputs, square wave, inverted square wave, pulse, inverted pulse, 10 volt cmos drive, 5volt TTL drive, trigger output, direct or delayed main oscillator, free run or gated, hi/low gate trigger. All done with 4027's, 4066's, and 4093's
astable and monostables 4047's, output line drivers 4041's. Maybe now I will select the timing capacitors and the pots using logic (or maybe not)
Biggest headache will be making a pcb for it.
As a word of advise to those not used to breadboarding when working with large numbers of ic's, note that I numbered the logic and steering ic's and used different coloured wires for signal and logic. this helps keep track of what goes where as do the led's on the 4027's that indicate which outputs are high or low so that I could easily send the right outputs to control the 4066 bi-lateral switches.
Two weeks of brain ache and I'm quite pleased with my first real logic design, and a big THANK YOU to all of you who helped me when I had some unexpected circuit behaviour.P1010004.JPG P1010007.JPG
 
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