Hi,

As part of my circuit i'm currently working on, i have one part in which i have the following D type flip-flop:

http://img21.imageshack.us/img21/6748/dtype1.jpg

However, for my circuit, i need the output (DAout) to be the opposite values, but when placing a not gate on the output, i get the following output:

http://img34.imageshack.us/img34/3903/dtype2.jpg

Would anyone be able to help me please with my problem?

Thanks.

 

Simulators generally don't assign initial conditions to flip-flop outputs. It looks to me as if, in your first sim the FF output started out low, and in the second sim it started out high. Provide an initial reset pulse before the clock transition. And tie PRN to vcc in all cases.

 

Ok, thanks for your help.