From what I can tell, this circuit drives the PMOS(enhancement) to create a current source. The VS2-supply will be a 20V @ 2A(max) output of a power supply, while the VS1-supply would be the output of a DAC with outputs for currents that we want- in this case 50mA intervals of 78.125mV steps. My current issue is with simulating this circuit. During various steps (no apparent rhyme or reason) the maximum current will be seen on the load even though the "set current" will be much lower. I cannot figure out why and would appreciate any help on what this circuit is and how to modify it correctly.
Also of note VS3=VS2, however I split it for sake of visual cleanliness.