Creating MOD-12 Asynchronous Down Counter from MOD-16 Asynchronous Down Counter

Thread Starter

Kweonamy

Joined Nov 24, 2019
5
Hello, I'm trying to create a mod-12 asynchronous down counter by modifying the mod-16 down counter. Is it possible to use the regular design of mod 16 down counter using D-type flip flop and modify the starting sequence(using set/reset) to be 1100 to create a mod-12 down counter?
 

djsfantasi

Joined Apr 11, 2010
6,504
So what’s the mod-16 down counter? What chip is used? Or if it’s constructed of discrete components you need to provide a detailed schematic. You’re looking for a chip/schematic with a preset feature!
 

dl324

Joined Mar 30, 2015
10,943
Welcome to AAC!
I'm trying to create a mod-12 asynchronous down counter by modifying the mod-16 down counter. Is it possible to use the regular design of mod 16 down counter using D-type flip flop and modify the starting sequence(using set/reset) to be 1100 to create a mod-12 down counter?
You're overthinking the problem.

Is this homework?
 

Thread Starter

Kweonamy

Joined Nov 24, 2019
5
So what’s the mod-16 down counter? What chip is used? Or if it’s constructed of discrete components you need to provide a detailed schematic. You’re looking for a chip/schematic with a preset feature!
Image result for mod 16 asynchronous down counter
I'm using 4013 chip, and this is the part of the schematics that I'm using
 

ci139

Joined Jul 11, 2016
1,554
Is it possible to use the regular design of mod 16 down counter using D-type flip flop and modify the starting sequence(using set/reset) to be 1100 to create a mod-12 down counter?
  1. It is possible to achieve this on some MOD16 counters more neatly than with some others
  2. ? set/reset (you need to choose one) to be 1011 possibly -- that unless you're told to create 12 down to 1 counter which could complicate things . . . as the range you can use is either 0 to 11 (with up counter) --or-- 15 down to 4 or 0 down to 5 (with down counter) ← a one of these to decode it to 12 down to 1
about decoder chip https://www.ti.com/lit/ds/symlink/sn54f283.pdf -- e.g. to make/map a range shift (5 to 0) to (1 to 12) the 4 must be added to the 1-st
 
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ci139

Joined Jul 11, 2016
1,554
the example shows a part of how to make down counter from up counter
( if you clear the input carry and map Q0 to Q3 instead of their inversions then you can shift the count . . . up...
...but the SUM has MOD 16 without and MOD 32 with the carry applied to it )
U-D - Counter - Adder.png

the fast compiled Adder model :
Code:
* the listing of AdderS3.cir

* 1V to GND - Only !!!
* 2-Bit Adder with Carry I/O
* Port Map : Bit1 Bit2 Cin Cout Sum
.SUBCKT AdderS3 1 2 3 4 5
B1 7 0 V=u(V(1)*2-1)
B2 8 0 V=u(V(2)*2-1)
B3 9 0 V=u(V(3)*2-1)
R1 7 6 R=Rsum
R2 8 6 R=Rsum
R3 9 6 R=Rsum
B4 4 0 V=u(V(6)*2-1)
B5 5 0 V=u((V(6)*3-V(4)*2)*2-1)
.param Rsum=1k
.ENDS

* the listing of AdderS9.cir

* 9-Bit Adder with Carry I/O
* Port Map : NibbleA NibbleB Cin Cout SumNibble
.SUBCKT AdderS9 1 2 3 4 5 6 7 8 9 10 11 12 13 14 PARAMS: Vhigh=1 Vlow=0 Td=2n Vt=.5 Vh=0
B0 20 0 V=pVT
B1 21 0 V=u(V(1,20))
B2 22 0 V=u(V(2,20))
B3 23 0 V=u(V(3,20))
B4 24 0 V=u(V(4,20))
B5 25 0 V=u(V(5,20))
B6 26 0 V=u(V(6,20))
B7 27 0 V=u(V(7,20))
B8 28 0 V=u(V(8,20))
B9 29 0 V=u(V(9,20))
X1 21 25 29 30 33 AdderS3
X2 22 26 30 31 34 AdderS3
X3 23 27 31 32 35 AdderS3
X4 24 28 32 37 36 AdderS3
B11 39 0 V=uStd(V(33))
B12 40 0 V=uStd(V(34))
B13 41 0 V=uStd(V(35))
B14 42 0 V=uStd(V(36))
B10 38 0 V=uStd(V(37))
A1 38 0 0 0 0 0 10 0 SCHMITT Vhigh=pVP Vlow=pVM Td=pTT Vt=pVT Vh=pVH
A2 39 0 0 0 0 0 11 0 SCHMITT Vhigh=pVP Vlow=pVM Td=pTT Vt=pVT Vh=pVH
A3 40 0 0 0 0 0 12 0 SCHMITT Vhigh=pVP Vlow=pVM Td=pTT Vt=pVT Vh=pVH
A4 41 0 0 0 0 0 13 0 SCHMITT Vhigh=pVP Vlow=pVM Td=pTT Vt=pVT Vh=pVH
A5 42 0 0 0 0 0 14 0 SCHMITT Vhigh=pVP Vlow=pVM Td=pTT Vt=pVT Vh=pVH
.param pVP = {Vhigh}
.param pVM = {Vlow}
.param pVT = {Vt}
.param pVH = {Vh}
.param pTT = {Td}
.param pVpp = {pVP-pVM}
.func uStd(vi){pVM+u(vi*2-1)*pVpp}
.include AdderS3.cir
.ENDS
__
Adder - Test - ES010b.png
 
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