Hello!
Just want to say that this is my very first time using LTSpice (I installed it 20 minutes ago),and I know that my questions are most likely trivial to people like you,but I'd like to learn so any guidance or help will be much appriciated.Now to the task
A pulse-width modulated square-wave signal should be filtered so that at output of the
Filter the mean value of the signal is present. The fundamental frequency is fPWM = 10 kHz.
This corresponds to a period of TPWM = 1 / fPWM = 100 µs.
1.Change the resistance and capacitance value so that the capacitor voltage
can no longer follow the input voltage. In the steady state
the maximum and minimum voltage value should be distinguished at the capacitance by a maximum of 100 mV
To do this, also adjust the simulation time. Which component do we need to use?
2.What happens if you change the tone in the voltage source and thus the duty cycle
(Duty cycle) of the PWM changes. Describe your observation.
3.Increase the filter effect by connecting another RC element between the voltage source and the resistor. Plot the voltage curve over both
Capacitors. What are you observing
Now for part 1. I tried simply finding how to build a generic filter in LTspice. I have done that like this (see attachment) but now I am not sure how to check if the capacitor voltage can no longer follow the input voltage.If I go to run and click on the capacitor I am getting the current (I) flowing through the capacitor.And to get get the value of the input voltage I have no Idea how to do.
Any help is appreciated! Thank you
Just want to say that this is my very first time using LTSpice (I installed it 20 minutes ago),and I know that my questions are most likely trivial to people like you,but I'd like to learn so any guidance or help will be much appriciated.Now to the task
A pulse-width modulated square-wave signal should be filtered so that at output of the
Filter the mean value of the signal is present. The fundamental frequency is fPWM = 10 kHz.
This corresponds to a period of TPWM = 1 / fPWM = 100 µs.
1.Change the resistance and capacitance value so that the capacitor voltage
can no longer follow the input voltage. In the steady state
the maximum and minimum voltage value should be distinguished at the capacitance by a maximum of 100 mV
To do this, also adjust the simulation time. Which component do we need to use?
2.What happens if you change the tone in the voltage source and thus the duty cycle
(Duty cycle) of the PWM changes. Describe your observation.
3.Increase the filter effect by connecting another RC element between the voltage source and the resistor. Plot the voltage curve over both
Capacitors. What are you observing
Now for part 1. I tried simply finding how to build a generic filter in LTspice. I have done that like this (see attachment) but now I am not sure how to check if the capacitor voltage can no longer follow the input voltage.If I go to run and click on the capacitor I am getting the current (I) flowing through the capacitor.And to get get the value of the input voltage I have no Idea how to do.
Any help is appreciated! Thank you
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