Hello Everyone.Can we set the VGS for turning on Mosfet without using a resistor on Gate.Does the gate of the Mosfet will damage if we apply VGS directly without any resistor?

 

hi,
What level of Vgs are you you considering.?
E

 

The amount of current into or out of the gate is very small, it looks like a big capacitor. That said the SiO2 (Silicon dioxide) layer which insulates the gate from the semiconductor material is very thin and if the gate voltage is high enough it can punch through the insulation layer. The purpose of the resistor is to LIMIT the current into and out of the gate. Why would you insist on not having one? Could you really be that cheap?

 

hi,
What level of Vgs are you you considering.?
E[/QUOTE
i am considering a 3 volt VGS

 

hi,
I would suggest a 100R thru 1k Gate input resistor, what is the application.?
Also is your N MOSFET capable of working with a 3Vgs voltage.?
E

 

The purpose of the resistor is to LIMIT the current into and out of the gate.

Usually a small MOSFET gate resistor is used to damp any parasitic oscillation due to the tank circuit formed by stray circuit inductances and the gate capacitance.
Don't think there's any normal conditions where the gate current needs to be limited.

 

hi,
I would suggest a 100R thru 1k Gate input resistor, what is the application.?
Also is your N MOSFET capable of working with a 3Vgs voltage.?
E

Yes according to datasheet it should work i am using A09t Mosfet.The datasheet is attached

 

hi,
That looks OK, I would suggest a 100R.
E

 

Hello Everyone.Can we set the VGS for turning on Mosfet without using a resistor on Gate.Does the gate of the Mosfet will damage if we apply VGS directly without any resistor?

What MosFET are you using, so we can evaluate it's specifications?

 

Q = C x V
I = C x dV/dT

If we switch a 1000 pf gate C (not counting miller), 10V, in 20 nS
we get -

I = 10^-9 x ( 10 / 2 x10^-8 ) = ,5A

Its not unusual to see in power designs peak gate currents of several
Amps.


Regards, Dana.

 

What is driving the gate? I never use a resistor when driving it from a micro, there is sufficient resistance in the output driver in the chip.

Bob

 

Usually a small MOSFET gate resistor is used to damp any parasitic oscillation due to the tank circuit formed by stray circuit inductances and the gate capacitance.
Don't think there's any normal conditions where the gate current needs to be limited.

Connecting a low impedance voltage source to the gate was my idea of a non-normal condition.

 

What is driving the gate? I never use a resistor when driving it from a micro, there is sufficient resistance in the output driver in the chip.

Bob

Gets a little "sticky" here driving a MOSFET directly on a GPIO pin.

Problem is GPIO is looking into a short, important case switching MOSFET off.
So it has an internal Rdson, also if speced well a limit on pin current. Dumping
charge into the substrate is a tried and true method of causing micro to do crazy
things because where that charge goes not well defined. We probably get away
with it because, as you say, the output N Channel has a finite Rdson so limits current.
But to what level of current ? And this also causes transient V rises on isolated
Vss routes so logic noise margin affected in that area.

So I use an R, even though it slows down switching, because I think it is an "art"
solution to not well speced GPIO behavior. A seat of the pants duct tape fix for
lack of inadequate specs.


Regards, Dana.

 

For me it’s more important to have a pull up or pull down than a gate resistor. I usually use a 1K if I have the space and for longevity and to suppress noise. But for testing and prototyping it’s never caused issues.

 

Gets a little "sticky" here driving a MOSFET directly on a GPIO pin.

Problem is GPIO is looking into a short, important case switching MOSFET off.
So it has an internal Rdson, also if speced well a limit on pin current. Dumping
charge into the substrate is a tried and true method of causing micro to do crazy
things because where that charge goes not well defined. We probably get away
with it because, as you say, the output N Channel has a finite Rdson so limits current.
But to what level of current ? And this also causes transient V rises on isolated
Vss routes so logic noise margin affected in that area.

So I use an R, even though it slows down switching, because I think it is an "art"
solution to not well speced GPIO behavior. A seat of the pants duct tape fix for
lack of inadequate specs.


Regards, Dana.

@danadak
I have many times directly driven MOSFETs from PIC microcontroller I/O pins. Each PIC output pin has a defined current carrying capacity and you cannot increase pin current beyond that limit except by (a) exceeding the PIC supply voltage or (b) driving the pin negative with respect to the PIC ground--the current is limited by the MOSFETs internal to the PIC. There is no prohibition against momentary or even continuous pin currents of that limit value. One has to assume that Microchip Technology has designed their chips such that I/O currents are safely handled without disruption of other functions. Many PICs have separate analog and digital grounds to ensure sensitive functions such as ADCs are not corrupted by digital ground currents. To the PIC, driving a MOSFET is no different than driving a capacitor or LED. I must assume that all commercial microcontrollers have similar specs (even if you must find them in a document separate from the specific device datasheet). All that said, causing all I/O pins of a device to simultaneously drive capacitors may with some micros indeed cause a problem.

 

hi,
That looks OK, I would suggest a 100R.
E
View attachment 181847

Thanks i got it .Thanks for your time

 

Usually a small MOSFET gate resistor is used to damp any parasitic oscillation due to the tank circuit formed by stray circuit inductances and the gate capacitance.
Don't think there's any normal conditions where the gate current needs to be limited.

Thanks for your time

 

@danadak
I have many times directly driven MOSFETs from PIC microcontroller I/O pins. Each PIC output pin has a defined current carrying capacity and you cannot increase pin current beyond that limit except by (a) exceeding the PIC supply voltage or (b) driving the pin negative with respect to the PIC ground--the current is limited by the MOSFETs internal to the PIC. There is no prohibition against momentary or even continuous pin currents of that limit value. One has to assume that Microchip Technology has designed their chips such that I/O currents are safely handled without disruption of other functions. Many PICs have separate analog and digital grounds to ensure sensitive functions such as ADCs are not corrupted by digital ground currents. To the PIC, driving a MOSFET is no different than driving a capacitor or LED. I must assume that all commercial microcontrollers have similar specs (even if you must find them in a document separate from the specific device datasheet). All that said, causing all I/O pins of a device to simultaneously drive capacitors may with some micros indeed cause a problem.

Thanks for ur time

 

@danadak
I have many times directly driven MOSFETs from PIC microcontroller I/O pins. Each PIC output pin has a defined current carrying capacity and you cannot increase pin current beyond that limit except by (a) exceeding the PIC supply voltage or (b) driving the pin negative with respect to the PIC ground--the current is limited by the MOSFETs internal to the PIC. There is no prohibition against momentary or even continuous pin currents of that limit value. One has to assume that Microchip Technology has designed their chips such that I/O currents are safely handled without disruption of other functions. Many PICs have separate analog and digital grounds to ensure sensitive functions such as ADCs are not corrupted by digital ground currents. To the PIC, driving a MOSFET is no different than driving a capacitor or LED. I must assume that all commercial microcontrollers have similar specs (even if you must find them in a document separate from the specific device datasheet). All that said, causing all I/O pins of a device to simultaneously drive capacitors may with some micros indeed cause a problem.

I too have driven directly MOSFET gates. As a production engineer back in the day I saw chip layouts that
effectively serialized grounds, sometimes a lack of them.If you place a short on a pin to Vdd with an output
driving logic 0 some datasheets will reveal what that current limit is, some not. One can "assume" vendors
have done the right thing, but as engineers we often find what we think and what is actual don't always
mesh, why I got a nice paycheck over the years. Separate grounds very important, but do not address dumping
large amounts of charge into a substrate via NMOS side of CMOS output. All this said the industry has, I believe,
gotten better (eg. the port limit of total current, internal buss drop limitations now in most datasheets, also latchup) with specs.
But as a strong advocate of read the data sheet, if the issue is not covered in the datasheet one cannot "assume"
anything. Buyer beware.....

Regards, Dana.

 

I saw a good point there. I wouldn’t think twice about adding couple hundred pF cap on an output without limiting the current to it. It’s basically what most gate capacitance is. Maybe someone can do a simulation or actually capture the inrush current on a scope and see what we are talking about.