I saw a good point there. I wouldn’t think twice about adding couple hundred pF cap on an output without limiting the current to it. It’s basically what most gate capacitance is. Maybe someone can do a simulation or actually capture the inrush current on a scope and see what we are talking about.

Sadly industry, as a whole, does not give us Spice models for the GPIO pins. Spice
would not necessarily give us space charge distribution around the die, but its better
than being totally blind.


That should change.

 

hi,
The TS states he is using a 3V Gate drive, using a 100R as I have suggested will give a instantaneous peak current of only 30mA.
E