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The formula for a charging or discharging capacitor with initial voltage is:
V=(E*R2)/(R2+R1)-((E*R2-v*R2-v*R1)*e^(-t/(C*R2)-t/(C*R1)))/(R2+R1)
\( {\Large{V=E\frac{R_2}{R_2+R_1}-\frac{\left({E·R_2}-v\left({R_2+R_1}\right)\right)·e^{-\frac{t}{CR_2}-\frac{t}{CR_1}}}{R_2+R_1}}} \)

and for your circuit (with the diode part removed and V is the voltage at the second comparator input) is:
V=(E*R5)/(R5+R4)-((E*R5-v*R5-v*R4)*e^(-t/(C*R5)-t/(C*R4)))/(R5+R4)
\( {\Large{V=E\frac{R_5}{R_5+R_4}-\frac{\left({E·R_5-v\left({R_5+R_4}\right)}\right)·e^{\frac{-t}C\left({\frac1{R_5}+\frac1{R_4}}\right)}}{R_5+R_4}}} \)

This gets a little simpler if we define: R45=R4+R5, and A=(R4+R5)/(R4*R5*C)

then we can write it as: V=(E*R5)/R45-(e^(-t*A)*(E*R5-v*R5-v*R4))/R45
\( {\Large{V=\frac{E·R_5-\left({E·R_5-v\left({R_5+R_4}\right)}\right)·e^{-tA}}{R_{45}}}} \)

To use that formula, replace R4 and R5 in the expression and in R45 and A, then set v equal to the initial capacitor voltage and set E equal to the output voltage of the comparator. Assume for charging the output of the comparator E is +Vcc and for discharging the output of the comparator E is zero volts (0v). You then look for the time that the filter output reaches the set voltage of the second capacitor on the noninverting input.

The time to reach the set point is (log here is the natural log ln): t=-(log(E*R5-Vset*R45)-log((E-v)*R5-v*R4))/A
\( t=\frac{-1}{A}\left({ln\left({E·R_5-V_{SET}·R_{45}}\right)-ln\left({\left({E-v}\right)·R_5-v·R_4}\right)}\right) \)

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i some while ago checked the 555 RCR timing formula ~ just for cross reference
~though from the 555 ver. -- only the there discharge part suits for your case's charge one and your discharge is a simple parallel RC discharge
where \( t_{DC}={\Large\frac1{\frac1{R_4}+\frac1{R_5}}}\left(C_1+C_2\right)ln{\large\frac{V_{C_{HI}}}{V_{C_{LO}}}} \)

 

I forgot to mention that in my formulas lower case 'v' is the initial cap voltage. It's important to have that too.

 

a small footprint alternative to an MCU/digital https://www.analog.com/en/resources...ickly-and-reliably-solve-timing-problems.html ← LTC6994 leading edge delay of 4.2s with some unbounce filter at the front would give you your intended function

also 3(4) ≤ Vs ≤ 16 V cMOS https://www.ti.com/lit/ds/symlink/tlc393.pdf ( irrelevant : has 100ns t.pd (5MHz BW) → at input overdrive ← )
substituting your initial post to . . .
↓ C3 C4 are required to attenuate the supply oscillations
at the simultaneaous transition of the Y and Z // large enough power rail cap might do the same trick
also the functionality lacks a feature - that when the switch is not pressed the circuit constantly discharges the timing capacitor
( can be improved if the discharge network is enabled by a mininimum voltage level detector at the timing capacitor )