Can't understand this power-on-reset comparator circuit (acts like SR flip-flop?)

Thread Starter

Abdallah_Abdelbaset_

Joined Jul 24, 2026
1
Hi everyone,


I'm trying to understand this circuit (attached image) as part of an experiment I'm running, based on this video:




I understand basic comparator operation and the standard Schmitt trigger configuration (positive feedback creating hysteresis around V+ = V-), but this particular circuit has extra components I can't fully make sense of. I'd really appreciate a breakdown of what each block is doing and why.


Specifically:


  • C1 and D1 are connected between the Vc line and the V+ node. What role does this RC/diode combination play?
  • D2 and R3 form a path from OUT back to V+. This looks like positive feedback, but through a diode rather than a plain resistor?
  • D3, R5, C2, D4, and Vcc What is each component's function here (particularly D4)?
  • R2 ties V+ to ground, and R4 is on the output. What are these two resistors doing in context ?
My main question: how do C1/D1 and D2/R3 together turn a plain comparator into something that behaves like an SR latch? Which diode orientation determines the "set" vs "reset" state?


I'll attach the schematic (hand-drawn) . Any explanation of the signal flow at power-on and during a "set/reset" transition would be hugely appreciated.


Thanks in advance!
 

Attachments

Pyrex

Joined Feb 16, 2022
525
Imho, when Vcc is first applied , C2 is discharged, D3 conducts ,so comparator's input is held to low. Output is low, too. C2 charges up to Vcc, but due to D3, which do not conduct, comparator output remains the same. When Vcc is removed, C2 quickly discharges thru D4 and is ready for operation again.
If a high-level pulse is applied to the device's input Vc, due to C1, it forces the comparator to switch to a high level. Comparator output is tied to the input thru R3 and D2, D2 conducts now , so comparator remains at high level , as long as input is high.
If Vc input is low, D1 start to conduct and held comparator's input to low, R3 limits current from the output during transition. Comparator's input remains low due to R2. Output is low and remains in that state .
It's important here what the output stage of the comparator is; if it's an open collector, R4 needs to be tied to Vcc.
 

ericgibbs

Joined Jan 29, 2010
21,517
Hi AA,
Having watched Sam's video, he explains in detail all your questions about the component functions.

E

For example;
R2 ties V+ to ground, and R4 is on the output. What are these two resistors doing in context
R4 is explained at ~6 minutes from the video start.
 

WBahn

Joined Mar 31, 2012
33,051
I think you will find that one of the keys is that the diodes and resistors form logic gates (known as DRL - Diode-Resistor Logic). This allows the input to trigger an action but then the comparator output to continue asserting that action even after the trigger is removed.
 
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