Commom emitter amplifier circuit - clarification

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Thread Starter

majawahar

Joined Jan 28, 2016
15
Dear friends,

Can some one clarify my doubt

In a 12V single stage common emitter amplifier circuit, i assume that when the circuit is on with a steady +12 DC, the voltage and current accross the transistor collector,base and emitter will be constant and will vary only when a sino sidal wave or anny other wave is appled at the input (base) of the transistor

If i am wrong then can some one explain ?

Regards

M.A.Jawahar
 

#12

Joined Nov 30, 2010
18,167
Yes. You have described the steady state conditions for a common emitter amplifier stage. In the absence of a changing signal on the base, the collector current and voltage will be stable.
 

Thread Starter

majawahar

Joined Jan 28, 2016
15
thanks AAC, but when i tried to simulate the circuit under the above condition and tried to check teh base collector & emitter current i found the the currents continuously changing.Can you suggest me what is happening?
Should i send the circuit as attachment.Will you be able to spare some time and read the attachment and guide me what i have done wrong
 

#12

Joined Nov 30, 2010
18,167
There is nothing in that 5.3 MB PDF about this circuit. It mentions CADSOFT. Is that your simulation software?

R1 is not supposed to have 6 volts across it. It calculates as more than 8 volts.
You have a problem with simulation. I don't know how to simulate. I can't fix a simulator problem.

I am called, "Number Twelve".
Perhaps somebody else can help with the simulation problem.
 
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