Hi Everyone,

I am a new graduate hardware engineer. I have recently decided to study about control loops and feedback circuits for power supplies.
The only software I use so far is proteus design suite. I have Christophe Basso's books where he modelled some power supplies with feedback circuits.
But I have a hard time to convert it from Isspice or Ltspice to proteus design suite. If anyone can give me a hand, I would be very happy. I attach an example circuit from his book, please take a look.

Regards

 

The schematic seems straightforward and I believe all of the components on the schematic are documented with subcircuits in Basso's book. Does proteus understand spice subcircuits?
Did you have a specific question about the implementation of any of the sub-circuits on the drawing?

 

I don't think proteus understands spice subcircuits.
I couldn't understand the logic and working principle of the gain block and PWM switch VM. So I can't figure out what component I can use in proteus simulation.

 

I don't think proteus understands spice subcircuits.

According to their website: "Proteus Virtual System Modelling (VSM) blends mixed-mode SPICE simulation with world leading fast microcontroller simulation", so I would think it would understand Spice subcircuits.

 

The gain block simply multiplies the input voltage by a constant.
The PWM switch is a voltage controlled switch and a diode.
Is your copy of Basso the (2008) version or the (2014) version so I can tell which page the subcircuits are on.
Here is the basic buck regulator without using any special symbols

 

The gain block simply multiplies the input voltage by a constant.
The PWM switch is a voltage controlled switch and a diode.
Is your copy of Basso the (2008) version or the (2014) version so I can tell which page the subcircuits are on.
Here is the basic buck regulator without using any special symbols

Thank you for the documents. I have 2008 version.
I can't understand how he creates a pwm signal to control the switch.

 

In the (2008) version the PWMVM is documented on pp. 202-203. It is the same switch & diode combination as in the diagram I provided.
In Figure 3-21, the expectation is that the analog excursions of the output voltage will open and close the switch. This is a highly unusual simulation as you can tell by the enormous inductor LoL and the enormous capacitor CoL. Nobody on this planet, or any other, could fabricate those components. I read his justification for doing this once upon a time but I have forgotten the details. It is in the book, you just have to find it. Where he is going with this development is to show that voltage mode control is generally unsuitable as the only method of controlling the output voltage. He will get around to explaining the advantages of cycle-by-cycle current mode control inside of the voltage mode control.

Look at the simple drawing I included in my previous post. V1 is a voltage source with the following specifications:

Pulse(0 5 0 10n 10n 5u 10u) so it will generate a repetitive series of pulses according to the following:
Vinitial (first argument) = 0V
Von (second argument) = 5V
Tdelay (third argument) = 0s, start immediately at t=0
Trise (4th argument) = 10n (nano-seconds)
Tfall (fifth argument) = 10n (nano-seconds)
Ton (6th argument) = 5u (micro-seconds)
Tperiod (7th argument) = 10u (microseconds)

This specifies an approximate 50% duty cycle square wave, swinging between 0V and 5V, with a period of 10 microseconds (100 kHZ), and equal rise and fall times of 10 nanoseconds. Accounting for rise and fall times the frequency is actually a bit lower. Below are the symbol and the sub-circuit file for the gain block.

 

In the (2008) version the PWMVM is documented on pp. 202-203. It is the same switch & diode combination as in the diagram I provided.
In Figure 3-21, the expectation is that the analog excursions of the output voltage will open and close the switch. This is a highly unusual simulation as you can tell by the enormous inductor LoL and the enormous capacitor CoL. Nobody on this planet, or any other, could fabricate those components. I read his justification for doing this once upon a time but I have forgotten the details. It is in the book, you just have to find it. Where he is going with this development is to show that voltage mode control is generally unsuitable as the only method of controlling the output voltage. He will get around to explaining the advantages of cycle-by-cycle current mode control inside of the voltage mode control.

Look at the simple drawing I included in my previous post. V1 is a voltage source with the following specifications:

Pulse(0 5 0 10n 10n 5u 10u) so it will generate a repetitive series of pulses according to the following:
Vinitial (first argument) = 0V
Von (second argument) = 5V
Tdelay (third argument) = 0s, start immediately at t=0
Trise (4th argument) = 10n (nano-seconds)
Tfall (fifth argument) = 10n (nano-seconds)
Ton (6th argument) = 5u (micro-seconds)
Tperiod (7th argument) = 10u (microseconds)

This specifies an approximate 50% duty cycle square wave, swinging between 0V and 5V, with a period of 10 microseconds (100 kHZ), and equal rise and fall times of 10 nanoseconds. Accounting for rise and fall times the frequency is actually a bit lower. Below are the symbol and the sub-circuit file for the gain block.

Do you know what V1 in figure 3-21 is used for? Is it a step/cranking voltage?

 

I have no idea WTF a step/cranking voltage is. That is new terminology. V1 is the source for doing an AC analysis. It is set to 1V so that all other AC voltages can be expressed in dB relative to that 1VAC source. The impedance of the big capacitor will be small even at low frequencies, and the impedance of the inductor will be huge. At ω=1 the impedance of the capacitor will be 1 mΩ and the impedance of the inductor will be 1 KΩ. This will effectively prevent X2, the AMPSIMP, and V1 from fighting each other.
When LTspice is not doing an AC analysis, V1 is effectively not there.

Here is an example of using such a source to analyze a passive 3-pole Butterworth Lowpass Filter. It sweeps the AC source from 1 mHz. to 10 Hz with 12 points per decade and calculate the magnitude and phase. The magnitude is at -6dB because of the insertion loss due to source resistance and termination resistance.