I have an board with several chips that operate at 5V (MAX98357A, logic gates (LVC family)) and others at 3.3V, such as the MPU, and two different power sources.
The primary power source: 12V from a switching power supply that is converted from 12V to 5V by a buck converter.
The secondary power source: 5V from USB-C.
The two power sources connect to TPS2116DRL power mux.
The mux output goes to two 3.3V LDO converters for the logic where the maximum input voltage is 5.5V.
The design is intended to have the lowest possible quiescent current.
I have some serious doubts:
1. The voltage applicable to the MUX input is 5.5V (6V max). I am concerned that the buck converter may produce high-frequency spikes and damage the MUX and the two downstream LDOs. Is this realistic?
2. If I insert an LDO with high voltage inputs downstream of the buck converter and increase the output voltage (by how much to be safe?), I would have a dissipation problem and lose a lot of efficiency considering that the currents on the 5V are in the order of 2/3 amps, BUT the good thing about this architecture is that if I insert a TVS diode between the buck and LDO, I would save the 5V LDO and everything downstream from any spikes!
Can someone with more experience than me help me, please?
The primary power source: 12V from a switching power supply that is converted from 12V to 5V by a buck converter.
The secondary power source: 5V from USB-C.
The two power sources connect to TPS2116DRL power mux.
The mux output goes to two 3.3V LDO converters for the logic where the maximum input voltage is 5.5V.
The design is intended to have the lowest possible quiescent current.
I have some serious doubts:
1. The voltage applicable to the MUX input is 5.5V (6V max). I am concerned that the buck converter may produce high-frequency spikes and damage the MUX and the two downstream LDOs. Is this realistic?
2. If I insert an LDO with high voltage inputs downstream of the buck converter and increase the output voltage (by how much to be safe?), I would have a dissipation problem and lose a lot of efficiency considering that the currents on the 5V are in the order of 2/3 amps, BUT the good thing about this architecture is that if I insert a TVS diode between the buck and LDO, I would save the 5V LDO and everything downstream from any spikes!
Can someone with more experience than me help me, please?

