Create a 50Ω driver.

 

Looking at the output of the VCO, using that link posted towards the start of this thread, it seems that the preferred output current is 20 MICRO AMPS, which tells me that the output impedance is not zero and not very low. Thus to drive a cable or almost anything except a CMOS input, there needs to be a buffer to handle the external load. So that can be a big part of why the output does not look like a nice square wave. To drive a "line" a line driver is appropriate.
In addition, it might possibly be that the power circuit for the IC has some resistance, in which case the Vcc of the PLL may be varying as the VCO feeds power to it's output pin. THAT will cause all sorts of unspecified operation.

 

If the purpose of this setup is, as I believe I have read, to evaluate the CD4046, one can dispense with the 50 ohm cable and just attach a high impedance scope probe to the output of interest, and leave the 59 ohm pain until and if it is needed later.

 

If the purpose of this setup is, as I believe I have read, to evaluate the CD4046, one can dispense with the 50 ohm cable and just attach a high impedance scope probe to the output of interest, and leave the 59 ohm pain until and if it is needed later.

Learningabout the capability of outputs is an important part of developing expertise and certainly the TS is gaining some experience in that area. Discovering the output limitations of IC devices is harder now that we no longer have "fan out" capabilities provided on data sheets, like in the early TTL logic days. That was one of the things that was missing in many of my logic classes. Fanout and propagation delays and ground bounce conditions. So the output capability of the VCO in a CD4046, or a 74HCT4046 is rather limited. My first experience with that device was in trying to generate a signal at 360 times the input pulse rate to create a digital timing circuit to read spark timing, while at Sun Electric, Industrial Systems Division. Loop filters can be tricky.

 

Create a 50Ω driver.

That is not a true 50Ω driver as it has a non-symmetrical output impedance due to the low output impedance of the emitter follower going high, but having a high output impedance when going low.
It will drive a properly terminated 50Ω line but not an improperly terminated one.

Note in the simulation below into a mismatched load, the pulse going high has several Out reflections due to the emitter-follower low output impedance, while the pulse going low has no Out reflections due to the follower output impedance now being equal to the 50Ω emitter resistor.

 

Thank you all for all your help. Even if some are not THE solution, it allows me to ask myself questions / read stuff and to improve myself in this area! And it will surely help other people on the same problem..
I thought I had found the solution by doing this:

1) When I simply put a 50ohm end-of-line impedance on my oscilloscope through one 1m RG-58 cable and the other 50cm RG-58 I have two signals that look identical on oscilloscope

2) When I put an impedance of 50ohm at the output of my VCO AND an end-of-line impedance of 50ohm on my oscilloscope I have two signals for the two cables which look identical:



However when I measure the frequency with a precision frequencymeter there is a frequency deviation of a few kHz. Difficult to give an exact number with the different measurement conditions ...
Could this be due to what?

 

(most of the post removed for clarity)
Could this be due to what?

Drift.

 

The VCO being used is not the weak output CD4046, instead is is the High Speed, High Output Current 74HC4046 that has a much lower output impedance.

 

Reading a frequency accurately with a counter requires setting the trigger at the correct level, which is not always simple. And reading a frequency with an oscilloscope has always been an approximation, in my experience. IN addition, the VCO in a PLL IC is always intended to be a part of a feedback system and so is not noted for being "rock stable" when running open loop as in this example.