Basic Verilog Testbench Help

Thread Starter

lllaurenlll

Joined Nov 28, 2015
2
I am writing a code to tell if a year is a leap year or not, however I'm having some trouble getting my testbenches to work correctly. I'm not sure what needs to be changed/fixed. Any help pointing the way would be greatly appreciated.

Code:
module DivisibleByFour(OUT, YM, YH, YT, YO); //divisible by 4
input [3:0]  YM,YH, YT, YO;
   //w =3 x=2, y=1, z=0


output OUT;

assign #10 OUT =  (~YT[0]&((~YO[3]&~YO[2]&~YO[1]&~YO[0])|(~YO[3]&YO[2]&~YO[1]&~YO[0]) //evens
  |(YO[3]&~YO[2]&~YO[1]&~YO[0])))
  |(YT[0]&((~YO[3]&~YO[2]&YO[1]&~YO[0])  //odds
  |(~YO[3]&YO[2]&YO[1]&~YO[0])));  

endmodule


TESTBENCH FOR DIVISIBLE BY FOUR

module DivByFourtb ( );

reg [ 3:0] YM, YH, YT, YO;
wire OUT;


DivisibleByFour  four(OUT,YM, YH, YT, YO);

initial
   begin
  #100 YM= 4'b0000;
  #100 YH= 4'b0000;
  #100 YT= 4'b0000;
#100 YO= 4'b0000;



#100 YT= 4'b0001;
#100 YO= 4'b0001;

#100 YT= 4'b0010;
#100 YO= 4'b0010;

#100 YT=  4'b0011;
#100 YO=  4'b0011;


#100 YT=  4'b0100;
#100 YO=  4'b0100;

#100 YT=  4'b0101;
#100 YO=  4'b0101;
#100 YT=  4'b0110;
#100 YO=  4'b0110;

#100 YT=  4'b0111;
#100 YO=  4'b0111;

#100 YT=  4'b1000;
#100 YO=  4'b1000;

#100 YT=  4'b1001;
#100 YO=  4'b1001;

#100 YT=  4'b1010;
#100 YO=  4'b1010;

#100 YT=  4'b1011;
#100 YO=  4'b1011;


#20 $finish();
end
endmodule


DIVISIBLE BY ZERO

module IsZero(A, B, C, D, YM, YH, YT, YO); //isZero
input [3:0] YM, YH, YT, YO;

output A, B, C, D;
assign #10 A = ~YO[3]&~YO[2]&~YO[1]&~YO[0];
assign #10 B = ~YT[3]&~YT[2]&~YT[1]&~YT[0];
assign #10 C = ~YH[3]&~YH[2]&~YH[1]&~YH[0];
assign #10 D = ~YM[3]&~YM[2]&~YM[1]&~YM[0];

endmodule


DIVISIBLE BY ZERO TESTBENCH

module IsZerotb ( );

reg [ 3:0] YM, YH, YT, YO;
wire LEAVE;

DivisibleByZero mer(LEAVE,YM, YH, YT, YO);

initial
   begin
  #100 YM= 4'b0000;
  #100 YH= 4'b0000;
  #100 YT= 4'b0000;
#100 YO= 4'b0000;
  
  #100 YM= 4'b0001;
  #100 YH= 4'b0001;
  #100 YT= 4'b0001;
#100 YO= 4'b0001;
  #100 YM= 4'b0010;
  #100 YH= 4'b0010;
  #100 YT= 4'b0010;
#100 YO= 4'b0010;
  #100 YM= 4'b0011;
  #100 YH= 4'b0011;
  #100 YT= 4'b0011;
#100 YO= 4'b0011;

#100 YM= 4'b0100;
  #100 YH= 4'b0100;
  #100 YT= 4'b0100;
#100 YO= 4'b0100;
  #100 YM= 4'b0101;
  #100 YH= 4'b0101;
  #100 YT= 4'b0101;
#100 YO= 4'b0101;
  #100 YM= 4'b0110;
  #100 YH= 4'b0110;
  #100 YT= 4'b0110;
#100 YO= 4'b0110;
#100 YM= 4'b0111;
  #100 YH= 4'b0111;
  #100 YT= 4'b0111;
#100 YO= 4'b0111;
#100 YM= 4'b1000;
  #100 YH= 4'b1000;
  #100 YT= 4'b1000;
#100 YO= 4'b1000;
#100 YM= 4'b1001;
  #100 YH= 4'b1001;
  #100 YT= 4'b1001;
#100 YO= 4'b1001;
#100 YM= 4'b1010;
  #100 YH= 4'b1010;
  #100 YT= 4'b1010;
#100 YO= 4'b1010;
#100 YM= 4'b1011;
  #100 YH= 4'b1011;
  #100 YT= 4'b1011;
#100 YO= 4'b1011;

#20 $finish();
end
endmodule
Used code tags for verilog
 
Last edited by a moderator:

WBahn

Joined Mar 31, 2012
25,907
I am writing a code to tell if a year is a leap year or not, however I'm having some trouble getting my testbenches to work correctly. I'm not sure what needs to be changed/fixed. Any help pointing the way would be greatly appreciated.

module DivisibleByFour(OUT, YM, YH, YT, YO); //divisible by 4
input [3:0] YM,YH, YT, YO;
//w =3 x=2, y=1, z=0
Are we supposed to just magically know what OUT, YM, YH, YT, and YO are?

Are we supposed to just magically know what you mean when you talk about "divisible by 0"?

The onus is on YOU to communicate your problem and your approach clearly and unambiguously.
 

Thread Starter

lllaurenlll

Joined Nov 28, 2015
2
So, YM= y millennia (thousands), YH= hundreds place, YT=tens place and YO= ones place. OUT is just the name of the wire/output. The first module is finding whether the last two digits are divisible by 4 and the second is divisible by zero, ie if the year divides by 100. A year is defined as a leap year when it is divisible by four, unless it is divisible by 100 and not 400. I did not post the code for finding when a year divides by 400. If the 10s digit is even, the digit in the ones place will be 0, 4, 8. If it is odd, the ones digit will be 2 or 6.
 
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