Basic questions related to MOSFET's operation

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ags289

Joined May 11, 2016
2
Hi,

I am trying to understand about the Mosfet operation.
It would be great if someone could help me get answers to these questions -
1. What happens to an AC signal (DC+ small AC signal) if it is applied to the gate of a MOS which is biased in Linear mode.
In the saturation mode, the output at the drain/source can be found using the small signal analysis mos model.
In the Linear mode, how do we analyse this? As the mos behaves as resistor here the output automatically should be DC+ AC component? What happens to the gain here?
From the transfer characteristics of, say CS amplifier, it is seen that the output at drain is small and dvo/dvi is small.

2. What would happen to the gain and other parameters for a circuit which is biased in saturation with an Ideal current source as seen in the image, for small signal analysis.
vo (node) DC value would be Vdd-I.Rd
Also with an assumption that device is huge (KW/L = huge), vs (node) DC component can be taken as -Vth.
What would be the AC component of voltages at these nodes? Will there be any gain here?
Also, If we have a big bypass cap at vs node, then the analysis would be the same as that for a CS amplifier. Is that right?
 

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CEJones

Joined Feb 12, 2016
13
To answer your first question, superposition is always a valid solution method (so yes the output will be the AC solution plus the DC solution in linear region the mosfet equation can be shown as
IDS = µnCox(W/L [(VGS-VT )VDS-(vds^2)/2]*(1+lambda*vds) the lambda accounts for mosfet impedance and can often be neglected for approximations. The output voltage is a direct function of ids* the output impedance and as such a relationship of dc gain can be derived. I don't feel like doing the algebra ;). The AC gain can be similarly represented with the small signal model. (No difference from when the device is in saturation, the difference is the DC bias point and gain that results)


QUOTE="ags289, post: 1067935, member: 346824"]Hi,

I am trying to understand about the Mosfet operation.
It would be great if someone could help me get answers to these questions -
1. What happens to an AC signal (DC+ small AC signal) if it is applied to the gate of a MOS which is biased in Linear mode.
In the saturation mode, the output at the drain/source can be found using the small signal analysis mos model.
In the Linear mode, how do we analyse this? As the mos behaves as resistor here the output automatically should be DC+ AC component? What happens to the gain here?
From the transfer characteristics of, say CS amplifier, it is seen that the output at drain is small and dvo/dvi is small.

2. What would happen to the gain and other parameters for a circuit which is biased in saturation with an Ideal current source as seen in the image, for small signal analysis.
vo (node) DC value would be Vdd-I.Rd
Also with an assumption that device is huge (KW/L = huge), vs (node) DC component can be taken as -Vth.
What would be the AC component of voltages at these nodes? Will there be any gain here?
Also, If we have a big bypass cap at vs node, then the analysis would be the same as that for a CS amplifier. Is that right?[/QUOTE]
 

CEJones

Joined Feb 12, 2016
13
Whoops switch my wording: As for your second question, the output capacitor makes it such that the DC bias is ground. When looking at AC response an infinite capacitor becomes a short and them the output load is placed in parallel with Rd. This is common SOURCE amplifier configuration which is your standard FET amplifier (with the most gain compared to CG or CD configuration) there is a slight modification to the standard gain due to Rs. This is known as source degeneration. In essence adding Rs cuts the gain to improve bandwidth.[/QUOTE]
 
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