Hi,
I am trying to understand about the Mosfet operation.
It would be great if someone could help me get answers to these questions 
1. What happens to an AC signal (DC+ small AC signal) if it is applied to the gate of a MOS which is biased in Linear mode.
In the saturation mode, the output at the drain/source can be found using the small signal analysis mos model.
In the Linear mode, how do we analyse this? As the mos behaves as resistor here the output automatically should be DC+ AC component? What happens to the gain here?
From the transfer characteristics of, say CS amplifier, it is seen that the output at drain is small and dvo/dvi is small.
2. What would happen to the gain and other parameters for a circuit which is biased in saturation with an Ideal current source as seen in the image, for small signal analysis.
vo (node) DC value would be VddI.Rd
Also with an assumption that device is huge (KW/L = huge), vs (node) DC component can be taken as Vth.
What would be the AC component of voltages at these nodes? Will there be any gain here?
Also, If we have a big bypass cap at vs node, then the analysis would be the same as that for a CS amplifier. Is that right?
I am trying to understand about the Mosfet operation.
It would be great if someone could help me get answers to these questions 
1. What happens to an AC signal (DC+ small AC signal) if it is applied to the gate of a MOS which is biased in Linear mode.
In the saturation mode, the output at the drain/source can be found using the small signal analysis mos model.
In the Linear mode, how do we analyse this? As the mos behaves as resistor here the output automatically should be DC+ AC component? What happens to the gain here?
From the transfer characteristics of, say CS amplifier, it is seen that the output at drain is small and dvo/dvi is small.
2. What would happen to the gain and other parameters for a circuit which is biased in saturation with an Ideal current source as seen in the image, for small signal analysis.
vo (node) DC value would be VddI.Rd
Also with an assumption that device is huge (KW/L = huge), vs (node) DC component can be taken as Vth.
What would be the AC component of voltages at these nodes? Will there be any gain here?
Also, If we have a big bypass cap at vs node, then the analysis would be the same as that for a CS amplifier. Is that right?
Attachments

22.2 KB Views: 15