That is likely the result of the non-linearity of the FET resistance with signal voltage and polarity.

Try to keep the AC voltage at the FET drain to be no more than 10 mV peak or so to minimize such distortion.
Your design has about 200mV peak across the FET, if my calculations are correct.
So a change in the circuit would be required so that the FET voltage is lower (and preferably doesn't change significantly with input voltage).

Here's an example design that keeps the FET voltage constant.

View attachment 123377

Hi there.
Yesterday i just searched "automatic gain control" circuit in this web site and i could finally found your schematic. I'm a new one here and I'm just curious about this circuit.
I have a pspice program for student. And I followed a schematic like your one.

1. Why is the Vout amplitude always about 700mV even when changing the resistor values? was this your intention? Is there a way to change the amplitude of Vout?

2. Since the Veb of the BJT is constant as Vout, how does the collector voltage of the BJT (=Vgs of the JFET) change according to the amplitude of Vin?

3. Can you explain in detail about the feedback network of the BJT and RC circuit?

It's such a great design, but it's hard for me to understand. I appreciate your help.

Mod Edit :
Please don't Hijack other member's thread.
This thread was separated from here.

 

1. Why is the Vout amplitude always about 700mV even when changing the resistor values? was this your intention? Is there a way to change the amplitude of Vout?

It's basically the Vbe of the BJT.

2. Since the Veb of the BJT is constant as Vout, how does the collector voltage of the BJT (=Vgs of the JFET) change according to the amplitude of Vin?

It's not constant, it varies slightly with the input signal.
This then varies the JFET gate voltage to control the signal amplitude.

3. Can you explain in detail about the feedback network of the BJT and RC circuit?

Basically the output amplitude controls the BJT collector voltage (JFET gate voltage).
This varies the source-drain resistance of the JFET, which varies the input signal attenuation from R1 and controls the output amplitude.

Below is the sim using a real op amp model:
It's also been modified to respond to the average value of the output, not the peak value, which is likely better for audio applications.
Note the variation in the JFET gate voltage, V(agc) with signal input variation, to control the output amplitude.

 

I feel very grateful for your response.
I made a mistake in my second question.

Lastly, I have one more question.

In your circuit, how is the base current determined? When I look at the principle you explained and the simulation, the base current changes according to Vin, but I don't understand why.

Thanks to your explanation of the circuit, I've learned a lot. Thank you.

 

In your circuit, how is the base current determined? When I look at the principle you explained and the simulation, the base current changes according to Vin, but I don't understand why.

The voltage across C3 is the average of the rectified output voltage, so increases until Q1's base voltage is around 0.6V, which starts turning it on.
This starts lowering the AGC voltage until a balance is reached between the output voltage, and the AGC voltage required to attenuate the signal to generate that output voltage.

As you can see, there is a slight output voltage variation with input voltage, which is the change required to control the AGC voltage for the minimum to the maximum input change (the regulation is not perfect).

Make sense?

 

I got it all.

You're so awesome. Have a good day

 

What is the intended application for this Compressor ?

Depending on the funkiness of the selected JFET,
it could be very difficult to achieve the desired end-result.

Are You open to using a different method/Circuit ?
.
.
.

 

I dislike the sound produced by most audio compressors:
1) When a loud sound comes to the input then it is much too loud at the output for a moment until the rectifier charges the capacitor enough for the AGC to reduce the level.
2) When the loudness of the input is suddenly reduced then the output level is much too low until the capacitor discharges.

 

Ausioguru again
Thats how compressors work
Its called the attack time. Your capacitor C3 and R6 determine the attack time.
And the attack time depends on the type of signal you have.
For music its a compromise. If the attack is quick, then bass signals get a rising and faling compression. If the attack is too short, then you get what you describe.
Good compressors cost lost of money because the circuit is far more sophisticated than what you have
And then there is the release time.

 

I dislike the sound produced by most audio compressors:
1) When a loud sound comes to the input then it is much too loud at the output for a moment until the rectifier charges the capacitor enough for the AGC to reduce the level.
2) When the loudness of the input is suddenly reduced then the output level is much too low until the capacitor discharges.

If you don't like it it's because the attack and release times are not adequate. A good sound engineer knows how to tune them for good results.

 

The voltage across C3 is the average of the rectified output voltage, so increases until Q1's base voltage is around 0.6V, which starts turning it on.
This starts lowering the AGC voltage until a balance is reached between the output voltage, and the AGC voltage required to attenuate the signal to generate that output voltage.

As you can see, there is a slight output voltage variation with input voltage, which is the change required to control the AGC voltage for the minimum to the maximum input change (the regulation is not perfect).

Make sense?

Hello,

I have some further questions regarding the AGC circuit based on the peak detector you initially proposed.

The circuit you mentioned, with only the JFET and BJT components that I could obtain, is as follows.
(Ignore that 2nd op-amp, thank u)



And here are the results of the PSPICE simulation I ran.




From what I understand:

By setting the input voltage and the resistor placed in series to be very large, when the JFET is turned on, the voltage applied to the op-amp's + terminal is set very low. Thus, it can be expressed as V+ = Vin * rds / R, and V+ linearly changes with Vin. Therefore, if the maximum amplitude of Vin changes, rds must change, leading to a variation in the JFET gate voltage.

Can you provide a more detailed explanation of the principle behind the DC value being transmitted to the JFET gate based on the magnitude of Vout (the maximum amplitude of the output obtained as Vin's maximum amplitude changes)? Because Vout reaches a maximum amplitude of 0.7V, while the collector voltage varies depending on the input voltage.

I really appreciate your help,,

 

The circuit you mentioned, with only the JFET and BJT components that I could obtain,

You substituted an NPN transistor with a PNP and a P-JFET with an N-JFET.
Why did you think that would work?

 

You substituted an NPN transistor with a PNP and a P-JFET with an N-JFET.
Why did you think that would work?

So, the only JFETs I could get were n-channel ones. That's why I simply... switched to PNP to turn on the BJT when the input voltage enters the negative region. And similarly, I applied -5V to the RC circuit for the same reason...!

 

Move R4 to be in series with the base of Q2.
As shown, the base of Q2 is shorting the op amp output.

Also increase R5 to 100KΩ or so.
And you also may have to play with the value of R3, depending upon the characteristics of the JFET.

Use a specific model for the PNP, not the generic model.

 

Can you provide a more detailed explanation of the principle behind the DC value being transmitted to the JFET gate based on the magnitude of Vout (the maximum amplitude of the output obtained as Vin's maximum amplitude changes)? Because Vout reaches a maximum amplitude of 0.7V, while the collector voltage varies depending on the input voltage.

Basically the BJT conducts when the output peak op amp voltage and thus its base voltage reaches about -0.7V, which then conducts short pulses of current to reduce the voltage on C2.
The collector voltage thus settles at the JFET gate voltage that generates an output voltage of about 0.7V peak.
This voltage, of course, varies with the amplitude of the input voltage, to maintain a relatively constant output voltage.

 

It's basically the Vbe of the BJT.
It's not constant, it varies slightly with the input signal.
This then varies the JFET gate voltage to control the signal amplitude.
Basically the output amplitude controls the BJT collector voltage (JFET gate voltage).
This varies the source-drain resistance of the JFET, which varies the input signal attenuation from R1 and controls the output amplitude.

Below is the sim using a real op amp model:
It's also been modified to respond to the average value of the output, not the peak value, which is likely better for audio applications.
Note the variation in the JFET gate voltage, V(agc) with signal input variation, to control the output amplitude.

View attachment 323334

Instead of jfet can we use MOSFET here? And I'm not able to understand ckt can you please explain it to me?

 

Small thing: you need to limit the base current for Q2.

 

There are probably over ~100 different ways to create an Audio-Compressor,
some are very simple, and easy to understand, and some are ridiculously complex.

It all depends on exactly what your expectations are, along with your Electronics-Experience ..........

Why do You want a Compressor ?
( A detailed explanation is required )

Do You need to use the Circuit posted earlier in this Thread ?,
or, are You open to other Circuit designs ?
.
.
.

 

Another thing, you have going have to drive the gate voltage below ground (to which the source of J1 is referenced) in order to keep the JFT from being on full all the time.

 

To completely avoid the compressor issue , which IS how they work, one alternate scheme will be an audio expander, that boosts the signal when the input gets louder. Far less objectionable. There is also a software audio leveler, made mostly for speaking, that measures the level at the start of a phrase and constantly adjusts the gain to hold the output level until the next gap in the signal. It is perfect for hearing speakers who fade away toward the end of a sentence.
Unfortunately this product, as an automatic device, is horribly expensive, and not presently available. It originally consisted of a sound engineer with a VU meter, headphones, and a noisless gain control with about 80 dB range.