Auto increment I2C addresses for PI4IOE5V96224ZLEX

Thread Starter

Rbshah7388

Joined Feb 9, 2021
2
I am using PI4IOE5V96224ZLEX for one of the project. It's a stackable I2C design, each stack shall have common hardware and will be stacked one upon the other. The base unit shall have an MCU which shall act as I2C master, while all other stacks as I2C slaves.

PI4IOE5V96224ZLEX datasheet specifies that there could be 64 such devices connected over the same I2C bus by muxing AD0, AD1, AD2 with VCC, GND, SCL and SDA. My questions are as following.

1. How to pass on SCL and SDA on address selection lines? I can not hardwire as the addresses should be dynamically assigned or auto incremented. I will be cascading 3 half adders to auto increment the three address lines which are initially set to zero.

2. Is it possible to do some Digital logical operation using Mux/Switch for SCL/SDA lines? For e.g. what will be the output if I 'OR' SCL with 1 or 0?

Datasheet is not very clear on how to use SCL, SDA for address selection lines and there are no other documents available on Diodes Inc. site.

Thanks in advance for any help into this.

Best Regards,
Rahul
 

Irving

Joined Jan 30, 2016
2,173
i2C requires that SCL and SDA goto every device... that passes the slave address and then often the register address within the specific device with the SDA data. The specific device is selected by pulling its CS pin low before the first falling edge of SCL. Muxing allows the use of multiple devices that share a common address.

The mux device provides a general purpose 24 channel i/o port, but as a i2C mux it is only used in output mode. Initially all the pins are set as inputs and are high, deselecting all peripherals. Then the MCU sends data to the mux in write mode to select the specific output(s) which go low after the rising edge of the last SCL pulse. As a device mux only one output is set low each time to address the specific slave. The next falling edge of SCL starts the i2C comms with the selected device.

The mux can be assigned a specific static address between 0x20 and 0xEF. The data sheet doesn't say anything about dynamic address allocation, however you can have up to 64 muxes on the bus addressing 1536 peripheral devices (though practically limited by i2C bus loading and drive requirements).

Suppose your mux is allocated address 0x20 and you want to write to slave 0x33 connected as device 0x9 (ie slave CS connected to mux output IO1_1). and then to another device, also address 0x33 but now connected as device 0x1. Then you connect AD2 and AD0 to ground and AD1 to SCL and your i2C traffic looks like:

Set mux to select slave device:
<Start><0x40><Ack><0xFF><Ack><0xFD><Ack><0xFF><Ack>
Address slave device
<Start><0x66><Ack><device specific data>...
Set mux to deselect #9 and select #1 slave device:
<Start><0x40><Ack><0xFE><Ack><0xFF><Ack><0xFF><Ack>
Address slave device
<Start><0x66><Ack><device specific data>...
Set mux to deselect all slave device:
<Start><0x40><Ack><0xFF><Ack><0xFF><Ack><0xFF><Ack>


Why would you want to dynamically assign addresses to the mux?
 
Last edited:

Deleted member 115935

Joined Dec 31, 1969
0
I am using PI4IOE5V96224ZLEX for one of the project. It's a stackable I2C design, each stack shall have common hardware and will be stacked one upon the other. The base unit shall have an MCU which shall act as I2C master, while all other stacks as I2C slaves.

PI4IOE5V96224ZLEX datasheet specifies that there could be 64 such devices connected over the same I2C bus by muxing AD0, AD1, AD2 with VCC, GND, SCL and SDA. My questions are as following.

1. How to pass on SCL and SDA on address selection lines? I can not hardwire as the addresses should be dynamically assigned or auto incremented. I will be cascading 3 half adders to auto increment the three address lines which are initially set to zero.

2. Is it possible to do some Digital logical operation using Mux/Switch for SCL/SDA lines? For e.g. what will be the output if I 'OR' SCL with 1 or 0?

Datasheet is not very clear on how to use SCL, SDA for address selection lines and there are no other documents available on Diodes Inc. site.

Thanks in advance for any help into this.

Best Regards,
Rahul
The PI4IOE5V96224ZLEX is a rather strange I2C expander,
"most" other I2C expanders , have address pins that are tied to a level, to select what address to respond to, This one has the three pins, that are tied to either 1, 0 or SCL / SDA.

The I2C bus is , as mentioned by @Irving, a bus, you connect all the devices SDA together and all the SCL together,
The master , then broadcasts an address of the device it wants to talk to.

i.e. you have to have some way of defining the each devices address uniquely.
In a "stack" this is often done by having the address pins go to the back plane,
so depending where pluged in as to the address,
In a true stack this is difficult,

And as you say these beasts needing SCL / SDA also multiplexed to the address pins,
its becoming real complex.

Can you simplify to use say the PI4IOE5V9535ZDEX
 

Irving

Joined Jan 30, 2016
2,173
@andrewmm Hi Andrew, quite a few devices now use the GND/VDD/SCL/SDA address selection technique, for example the ADS1115 ADC has 4 selectable addresses depending on whether you connect its ADDR line to one of the 4 signals above. So in theory you can have 4 in a system at addresses 0x48, 0x49, 0x4A and 0x4B. but if you need 8 then it gets complicated. One approach is to use only address 0x48 and selectively connect their ADDR lines to GND or VCC. through an external 3 to 8 mux which may or may not be i2C driven. Since VCC is a valid addressing mode for the ADS1115 you cannot use address 0x49 at all in the system as this would address all deselected ADCs at once. In theory you could multiplex GND/SDA/SCL using 3x 3 to 8 muxes leaving VCC as the 'deselected' state to address 24 ADC, though in this instance a 24-port expander as given would probably be easier if all DC were on the same PCB. One reason for NOT using a i2C port expander like this is latency. You have to transmit 32 bits of data (4 bytes) to configure the selection which adds around 40uS to the read/write time per device across a set of peripherals compared to a pure hardware solution.

Nevertheless you wouldn't normally mux the addr inputs to the mux itself, that's really making life complex!
 

Deleted member 115935

Joined Dec 31, 1969
0
@andrewmm Hi Andrew, quite a few devices now use the GND/VDD/SCL/SDA address selection technique, for example the ADS1115 ADC has 4 selectable addresses depending on whether you connect its ADDR line to one of the 4 signals above. So in theory you can have 4 in a system at addresses 0x48, 0x49, 0x4A and 0x4B. but if you need 8 then it gets complicated. One approach is to use only address 0x48 and selectively connect their ADDR lines to GND or VCC. through an external 3 to 8 mux which may or may not be i2C driven. Since VCC is a valid addressing mode for the ADS1115 you cannot use address 0x49 at all in the system as this would address all deselected ADCs at once. In theory you could multiplex GND/SDA/SCL using 3x 3 to 8 muxes leaving VCC as the 'deselected' state to address 24 ADC, though in this instance a 24-port expander as given would probably be easier if all DC were on the same PCB. One reason for NOT using a i2C port expander like this is latency. You have to transmit 32 bits of data (4 bytes) to configure the selection which adds around 40uS to the read/write time per device across a set of peripherals compared to a pure hardware solution.

Nevertheless you wouldn't normally mux the addr inputs to the mux itself, that's really making life complex!

Your last line has the point in a nut shell

Muxing SCL and SDA onto the address select lines is going to be harder for the OP than using the "simple" logic select ones
as indicated.
 

Thread Starter

Rbshah7388

Joined Feb 9, 2021
2
Hi Irving and Andrew, thanks for the detailed discussion and sharing your inputs. I am planning to use 3 half bit adders to auto increment the addresses and hook upto 8 devices, theoritically I don't see any challenge there. For the next set of 8 stacks, I am planning to mux the adder inputs with SCL or SDA, any one will suffice as I want max 16 layers only.
The only thing is I am adding more components.
 

Irving

Joined Jan 30, 2016
2,173
Hi Irving and Andrew, thanks for the detailed discussion and sharing your inputs. I am planning to use 3 half bit adders to auto increment the addresses and hook upto 8 devices, theoritically I don't see any challenge there. For the next set of 8 stacks, I am planning to mux the adder inputs with SCL or SDA, any one will suffice as I want max 16 layers only.
The only thing is I am adding more components.
You're welcome. I'm still not clear what address you are 'auto-incrementing' and why/how? Can you sketch out how you plan to use this device to drive other devices for one layer, and then for 2, 3, etc...
 
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